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How to tell OSS based AMS netlister to avoid using realresolve type

AnilRenesas

We have an AMS netlist which is generated based on AMS netlister.

In one of the modules we have the following:

discipline some_xxxx
  domain discrete;
  realresolve avg;
enddiscipline  

Unfortunately, realresolve is not yet supported in the Verilog-AMS LRM.
How can this be avoided when generating the .vams netlists.

Background is that these .vams netlists are no longer compilable using other EDA tools. 

Regards,
Anil 

 

  • Andrew Beckett

     You could make the code look like this:

     discipline some_xxxx
      domain discrete;
    `ifdef INCA
      realresolve avg;
    `endif
    enddiscipline

    or it could be `ifdef CDS_TOOL_DEFINE (both of these are covered in the documentation). That way it will be conditionally compiled only by Cadence simulators.

    Regards,

    Andrew. 

  • AnilRenesas

    Hi Andrew,

    Thanks for your reply.
    I understand your point but I have a query here.

    Please excuse me if my query is stupid, i am not an Analog or AMS designer.

    By using the mentioned way, what will happen to the behaviour.
    Will it remain the same ?
    I guess not, otherwise they would not have used it in the first place.

    To me it would seem like the behaviour would be different between Cadence simulator & others.

    In our case, we are using Cadence simulator for simulating the design but unfortunately for debugging, we need other tools. And here is when the problem arises. 

     

     

    Regards,
    Anil 

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