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Compile veriloga file

radiowaves

Hi,

I created a cellview of type VerilogA and opened with Read veriloga, entered my code. Earlier when I saved and closed the window, it compiled, reported errors and asked for symbol creation. However, now it does not compile when I close the window due to some reason.

What is the proper way to compile and create symbol for a veriloga module?

  • My guess is that either you don't have spectre in your UNIX path in this session (it uses spectre to do the check on the VerilogA and extract info such as the pin list, parameters etc), or you're using a third-party customization which uses a different simulator to do the check (and that's failing for some reason).

    Alternatively, if everything appears OK, maybe spectre is failing to run on your machine?

    You can check this in a terminal window, by running:

    spectre '#dpl' ./tmp.out '#ahdlfile' mylib/inv/veriloga/veriloga.va

    (the last argument is a path to the VerilogA code inside the view).

    Regards,

    Andrew.

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