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Resistance Hysteresis plot of Magnetic Tunneling Junction (MTJ) in ADE- CADENCE- Virtuoso

AkashUB

Hi All,

     I have modeled  two terminal STT-  Magnetic Tunneling Junction (MTJ) using Verilog-A , however I want to verify it with DC simulation and I want to plot  Resistance Hysteresis graph (i.e resistance  Vs DC  Voltage) using ADE. 

     I would like to request you if anyone could guide me for DC simulation of STT-MTJ.

     Thank you.

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