OSSHNL-514, Unsuccessful netlisting without errors!

Hello,

While using IC 6.1.6-64b, I am running into a new problem that started occurring all of a sudden yesterday evening. My netlisting fails for errors that it does not report (or reports in a hidden place). This is a design using config views and has a mix of functional/schematic views of analog+digital blocks. netlister.log says nothing other than the warnings that I am pasting below. No hidden dot files that can shed some more light. What could be wrong?

generate netlist...
INFO (AMS-2142): The AMS Unified Netlisting (AMS UNL) flow has been enabled.

INFO (AMS-2031): The instances bound to the views specified in the 'Netlist using spectre CDF simInfo'
field in the Netlister form (Simulation->Options->Netlister) will be netlisted as
analog primitives using the Spectre CDF simulation information.

Initializing the control file using cp:
cp /appmt/cadence_616_ISR8_082314/tools.lnx86/dfII/etc/si/control.ver ?*

/ONE LINE DELETED by Uma/ 
Begin Netlisting Nov 22 21:29:23 2014
INFO (VLOGNET-60): The stimulus name mapped table will not be printed in the
"PATH_DELETED_BY_UMA/testfixture.verilog" file. To print the stimulus name mapped table, set
simVerilogPrintStimulusNameMappingTable = t either in CIW or the .simrc file
before invoking Verilog netlister.

INFO (VLOGNET-62): Database internal net names will be printed for floating instance ports. To prevent
them from being printed, set simVerilogProcessNullPorts = t either in CIW or
the .simrc file.

INFO (VLOGNET-64): All cellviews in the design will be printed in the Netlist Configuration list.
If you want to print only those cellviews that need to be re-netlisted in the
list, set simVerilogIncrementalNetlistConfigList = t either in CIW or the
.simrc file.

INFO (VLOGNET-68): The initial state of stimulus of all inout pins is set to "z". To get inout
pins with initial state of "0", set hnlVerilogIOInitStimulusStr = "0"
either in CIW or the .simrc file.

WARNING (OSSHNL-360): Bus 't' uses both ascending and descending ranges.
The bus will be declared with an 'ascending' range as specified by the skill
flag 'hnlSetBusDirectionDescending'.
For a bus consisting of ranges used in both the directions, OSS uses the range
direction of the widest slice for the complete bus. When the widest slices use
conflicting directions, OSS uses the range direction defined by the skill flag
'hnlSetBusDirectionDescending'.

Registering text portions of design: This might take some time.. . Done.
INFO (AMS-2150): Generating the 'changedVarsSummary' file in the 'netlist' directory. This file prints the values of the netlister control variables, which are different from their default values. To disable the file creation, type 'envSetVal("ams.netlisterOpts" "print_control_vars" 'boolean nil )' in the '.cdsinit' file.

ERROR (OSSHNL-514): Netlist generation failed because of the errors reported above. The netlist might not have been generated at all, or the generated netlist could be corrupt. Fix the reported errors and regenerate the netlist.
...unsuccessful.