how to characterize flip flop with differential clock input (Liberate)

Hi,

I'm trying to do a characterization of a custom designed dynamic flip flop with a differential clock input.

Until now, I have succeeded to extract an useful '.lib'-file from a dynamic flip flop with one (single ended) clock input (which has an internal inverter to create the inverted clock) .  However, when I change my netlist and scripts in order to extract the flip flop with a differential clock input the extraction fails.

So my main question is:
How do you properly define the cell, the timing arcs (and settings) necessary to extract a useful '.lib-file' for a (dynamic) flip flop with a differential clock ?

For these characterizations, I am using the Liberate Library Characterization Platform (ALTOS_12.1) and the following definitions:

#---------------------------------------------------#
# My dynamic flip flop (differential clock) is defined as follows, with
#  D the data input,
#  clk and nclk, the clock and inverted clock and
#  Q and nQ, the data output and the inverted data output

define_cell \
    -pinlist {D clk nclk Q nQ} \
    -input {D} \
    -clock {clk nclk} \
    -output {Q nQ} \
    -ignore_input_for_auto_cap {clk nclk} \
    -ignore_pin_for_ccsn { clk nclk } \
    -delay delay_template_4x4_1 \
    -power power_template_4x4_1 \
    -constraint constraint_template_4x4_1 \
    {FFDyn2}

# my timing arcs are :

# constraint arcs from CK => D  setup
define_arc \
    -type setup \
    -pin D \
    -pin_dir R \
    -related_pin {clk nclk} \
    -related_pin_dir {R F}\
    {FFDyn2}

#
define_arc \
    -type setup \
    -pin D \
    -pin_dir F \
    -related_pin {clk nclk} \
    -related_pin_dir {R F}\
    {FFDyn2}


# constraint arcs from CK => D  hold
define_arc \
    -type hold \
    -pin D \
    -pin_dir R \
    -related_pin {clk nclk} \
    -related_pin_dir {R F}\
    {FFDyn2}

define_arc \
    -type hold \
    -pin D \
    -pin_dir F \
    -related_pin {clk nclk} \
    -related_pin_dir {R F}\
    {FFDyn2}

# delay arcs from CK => Q non_unate rising_edge
define_arc \
    -type edge \
    -vector {X R F R F} \
    -related_pin {clk nclk} \
    -delay_threshold {cross cross cross cross}\
    -dual_pin nQ \
    -pin Q \
    {FFDyn2}

#
define_arc \
    -type edge \
    -vector { X R F F R } \
    -related_pin {clk nclk} \
      -delay_threshold {cross cross cross cross} \
    -dual_pin nQ \
    -pin Q \
    {FFDyn2}

define_arc \
    -dual_related {nclk} \
    -related_pin_dir R \
    -pin clk \
    -pin_dir F \
    {FFDyn2}

define_arc \
    -dual_related {nclk} \
    -related_pin_dir F \
    -pin clk \
    -pin_dir R \
    {FFDyn2}


define_arc \
    -type edge \
    -pin nQ \
    -pin_dir R \
    -related_pin Q \
    -related_pin_dir F\
     {FFDyn2}

define_arc \
    -type edge \
    -pin nQ \
    -pin_dir F \
    -related_pin Q \
    -related_pin_dir R\
     {FFDyn2}
#---------------------------------------------------#

When I execute 'char_library -ccs -ccsn -ccsp -ecsm -extsim spectre'  the log file shows the following:

WARNING (LIB-59): On arc 'FFDyn2 D f MM8_s r combinational ccsn_first_stage clk&nclk 7 3 7', the CCSN stage output does not meet the recommended voltage levels for CCSN 'output_voltage' waveforms....

...

Characterization statistics:

Number of cells to characterize =    1
Number of define_cell commands  =    1
Number of passing cells         =    0
Number of failing cells         =    1
List of failing cells {FFDyn2}
Number of skipped cells         =    0
List of skipped cells {}

...

*Error* (write_library) : Failed characterization data found in ldb for cell:FFDyn2. 

________________

If I add '-user_arcs_only'  to char_library, the log file does not produce any errors/warnings and I have 0 failing cells.
However, when I try to read in the extracted '.lib-file', I get the following error:

Cell 'FFDyn2', pin 'nQ', The 'ccs_template' refers to a nonexistent or empty 'lu_table_template'

________________

Thank you in advance for any comment or help.