OSS-based netlister error with imported Verilog module

Dear all,

I imported a Verilog module in Virtuoso 6.1.6-64b.500.8 and want to simulate it with AMS and OSS-based netlister (incisiv 13.1).

The module is a very simple 66x4bit shift register with some additional flip flops and logic, which was synthesized with RC Encounter and I'd like to simulate it with schematic views for its internal gates. I really would like to avoid to use the 3-step netlister, since this module is part of a bigger chip, which ncvlog needs much much more time to netlist and elaborate than irun.

However, even if the 3-step simulation works, the OSS-netlister fails with error OSSHNL-514.

In the netlister.log only error -514 is reported, no other problems are issued. In the CIW however many error messages as the following are reported:

*Error* strcat: argument #1 should be either a string or a symbol (type template = "S") - nil

With stacktrace I get for any one of those messages something like this:

<<< Stack Trace >>>

(... in _hnlGlobalCDBAToVerilogAMS ...)

(... in _hnlMapInternalInstTermBusName ...)

(... in hnlVerilogPrintNetOnTerm ...)

(... in _amsOSSExplicitConnectionNetlist ...)

(... in hnlVerilogPrintExplicitNetlist ...)

(... in hnlVerilogPrintMacroRef ...)

(... in _amsOSSAmsSpecificPrintInst ...)

(... in hnlPrintInst ...)

(... in hnlProcInst ...)

hnlProcInst('(db:0x26f3031a db:0x2aaafa1a "schematic cmos_sch spectre spice verilog verilogams behavioral functional systemVerilog schematic veriloga vhdl vhdlams wreal" "schematic_cmos_sch_spectre_spice_verilog_verilogams_behavioral_functional_systemVerilog_schematic_veriloga_vhdl_vhdlams_wreal" nil "NCH_TOPDOWN_MSF" "test_shiftReg" "config" nil nil nil nil nil nil nil nil nil nil 0 1 ("CLK" "DOUT[0]" "DOUT[0]" "\\memcell[64] [0]" "n_6" "NRST") (1 1 1 1 1) (db:0x2311239a db:0x2311239e db:0x2311239b db:0x2311239c db:0x2311239d) ("CLK" "DOUT[0]" "\\memcell[64] [0]" "n_6" "NRST") (1) (db:0x2311239f) ("DOUT[0]") nil nil nil "DOUT_reg[0]" "SDFFSQX0"))

(... in hnlPrintDevices ...)

hnlPrintDevices()

(... in hnlPrintMacroCell ...)

hnlPrintMacroCell()

skillEvalString("hnlPrintMacroCell()" nil)

(... in hnlDoInstBased ...)

(... in hnlPrintNetlist ...)

(... in hnlRunForkedNetlister ...)

hnlRunForkedNetlister()

skillEvalString("hnlRunForkedNetlister" nil)

(... in hnlRunNetlister ...)

(... in unknown ...)

funobj@0x204b2e80()

(... in _amsOSSRunOSSDigital ...)

(... in _amsOSSRunOSS ...)

(... in _amsOSSAdeNetlist ...)

(... in asiNetlist (ams_session) ...)

asiNetlist('stdobj@0x21b247b8)

(... in asiApply ...)

(... in asiExecuteFlowchartStep ...)

(... in asiExecuteFlowchart ...)

(... in asiiDoSessionSpecificActions (t) ...)

(... in _asiiSimulateRequest ...)

_asiiSimulateRequest(stdobj@0x20cf82f0)

(... in asiiStartNextRequest ...)

(... in asiRequestSim ...)

(... in asiSimulateWithCB (t t t) ...)

(... in asiSimulate generic ...)

(... in asiSimulate (ams_session) ...)

(... in _sevRunEngine ...)

(... in sevRunEngine ...)

(... in sevNetlistAndRun ...)

sevNetlistAndRun('sevSession8)

where the only difference are some values in the call of hnlProcInst().

Does anybody have an idea what my problem could actually be?

As an additional information: I noticed, that if I set in my config view the module to be netlisted as functional, but I set explicitly all its instances to schematic view, it works....

Many thanks in advance,

Gabriel