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  3. LVS error for Dummy MOS

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LVS error for Dummy MOS

archive
archive over 17 years ago

Hi everybody.

I used Dummy Mos in my layout in order to have a better Matching. But when running LVS, DIVA generate error because it consider dummy MOS  as real.  There is a layer to specify dummy poly in order to avoid error due to dummy?? or there is another way to avoid that error?

I have tha same problem with ctm dummy, even if I put ctmdmy layer

thanks for your help!!


Originally posted in cdnusers.org by isazul
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  • archive
    archive over 17 years ago

    HI ,
    In fabrication "Dummy mos" layer will take as metal layer . While Doing Lvs Dummy mos layer will consider as Metal layer. if Two metals unintentionally joined with dummy mos ,then tool will treat as a short.
    In order to avoid this problem run DRC (it will take care of Dummy mos rules). While filling Dummy mos kept the Space to Metal layers.


    Originally posted in cdnusers.org by viswanadhbabu
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  • archive
    archive over 17 years ago

    Hi;
    In fact LVS see dummy poly as Net. I connected the 2 sides of the "dummy poly" to VDD for a PMos and to VSS for an NMos.
    To which potential do you connect your dummy Poly?

    It's correct when I run a DRC, There is No error.


    Originally posted in cdnusers.org by isazul
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  • archive
    archive over 17 years ago

    Dummy must be connected to ground to avoid noise.

    Or else

    Could you mention the lvs error displayed by tool.


    kvb


    Originally posted in cdnusers.org by viswanadhbabu
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    archive over 17 years ago

    In Diva you can put rules in the LVS rules to prune devices. Look in the Diva manual for information about pruning.

    Better still, put the dummy devices in the schematic too - that way you can check that they're actually present...

    Andrew.


    Originally posted in cdnusers.org by adbeckett
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