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Cell is not defined error (maybe an auCdl issue)

oldnick

I'm working on a design that has structures without schematics (CCD cells), effectively the layout and schematic are both empty as far as LVS is concerned. Anyway, I've modified the rule deck so that LVS picks up the structures and recognises each cell and that seems to work fine.

I've been trying to make a schematic symbol for the cell so that LVS sees the cell in the layout and the corresponding symbol in the schematic and can match them. Anyway, I made a symbol with the required in/out pins and did an LVS, which failed. I then copied the symbol view to create an auCdl view, which seemed to get me further through the LVS process but I ran up against this error and I'm not sure what to try next.

ERROR (NVN-13010): Cell CCD is not defined. 

Maybe there is something more to do with the auCdl, I just copied it to an auCdl view in library manager.

Any help would be great cheers.

Parents

  • It's PVS.

    But the tool requires a auCDL view to get that far. I can get a successful LVS by telling the LVS to use auLVS, but that only works when LVSing the layouts/schematics with the structures I've modified the rule deck to extract (And created a symbol for).

    It's something to do with extracting a netlist from the schematic it is having a problem with, but I can find nothing in the documentation about this.

    I need to have the LVS options for schematic as create CDL or it doesn't seem to be able to match transistors/diodes/resistors etc. from layout to schematic. It seems to see the devices in the layout and schematic but not recognise they are the same device.

    It may not be related to auCDL, but it is some sort of CDL issue, but I'm not sure where to even look in the documentation to find out what's going on.

Reply

  • It's PVS.

    But the tool requires a auCDL view to get that far. I can get a successful LVS by telling the LVS to use auLVS, but that only works when LVSing the layouts/schematics with the structures I've modified the rule deck to extract (And created a symbol for).

    It's something to do with extracting a netlist from the schematic it is having a problem with, but I can find nothing in the documentation about this.

    I need to have the LVS options for schematic as create CDL or it doesn't seem to be able to match transistors/diodes/resistors etc. from layout to schematic. It seems to see the devices in the layout and schematic but not recognise they are the same device.

    It may not be related to auCDL, but it is some sort of CDL issue, but I'm not sure where to even look in the documentation to find out what's going on.

Children
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