• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. high frequency analog behavior in gpdk045

Stats

  • Locked Locked
  • Replies 6
  • Subscribers 125
  • Views 15119
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

high frequency analog behavior in gpdk045

JorisLambrecht
JorisLambrecht over 10 years ago

Hello,

 I try to use the 1.8V nmos in the gpdk045 in a class B (F) PA. For this purpose, the drain current should be approx. the positive half of a sine (obtained by providing a strong (half) sine at the gate, dc-biased at approx. the treshold voltage, and under the assumption that Vds does not enter deeply into the knee region which would reduce Ids).

For W=200 um; L=150 nm; at 1 GHz; Ids is a "clean" positive half sine wave.

But at 15 GHz, it is not at all, Ids becomes a peak with a peak current much lower than the maximum of the half sine wave current at 1GHz; even though the drain source voltage stays high (about 1.9V) so it is not a low Vds that causes the drastic current decrease.

In fact, Vds does not change much from its bias point at all (a sine with an amplitude of 0.1V instead of the approx. 1.8V at 1 GHz).

I did a DC sweep first (with save::oppoint M0 included in a .scs-file) to find the parasitic drain capacitance (to ground); which is strongly voltage dependent (drain/bulk diode) and small at a high drain voltage.

This capacitance becomes in parallel with the load and forms a current divider in parallel with the ideal current source; but even with the maximal Cdd; the current should still be (much more than) about 47% of the maximal drain current and since this network is "linear"; it seems strange that the current waveform could be deformed from a half sine to a small peak...

I can't find an explanation for this behavior; and it seems that with these waveforms, I won't be able to design a "classical" (=non-switching) 15 GHz PA (although I already made a class E PA at 15 GHz in this gpdk).

The waveforms are similar at lower DC drain voltages.


If I substitute the same model parameters into ADS, I do obtain approx. half a sine, and the waveforms agree much more with my  expectations, but I am not sure whether the resulting model in ADS is correct since I had to insert the parameters by hand (automatic importer failed).

I am sorry for mentioning ADS again but I am just not sure where to look for a solution.

Kind regards,

Joris

  • Cancel
  • Andrew Beckett
    Andrew Beckett over 10 years ago

    Joris,

    I'm not sure what help I or others can give for this fictional process - this might be a flaw in the modelling or it might be a circuit problem - hard to say without seeing it.

    My guess is that you're from a University since otherwise you wouldn't be trying to do a design in a Generic PDK - we normally use them for demonstrators and so on so that we are technology independent, but nobody uses them for real design of course. So perhaps you can contact customer support (via your nominated person in the University programme), or if accessing the software via Europractice, contact Europractice support?

    I think we'd need to see the circuit and simulation to understand the issue properly.

    Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • JorisLambrecht
    JorisLambrecht over 10 years ago

    Hello Mr. Beckett,


    the schematic is a classical class B schematic.

    The problem seems to be solved now that I have reduced the original width (200um, L=150 nm)

    width a factor 10 and set the multiplier to 10 instead of 1. I don't understand why this makes such a

    big difference, since doing this should give the same total current and the same total parasitic capacitances (roughly).

    Was the original W/L-choice too large for the model (I didn't see warnings so I assumed this was not forbidden...)?


    Kind regards,

    Joris


    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 10 years ago

    There's an upper limit to the finger width of 10um - you get a message in the CIW and it also clips the value. If you enter the total width to be 200u, it should automatically se the finger width to 10u and the number of fingers to 20 - which should be broadly similar to having an m-factor of 20 (it's not quite the same, but should be close)


    So it seems a bit odd to me. That said, I've not done a detailed check of the PDK. Are you using the latest (v4.0) version of gpdk045?

    Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • JorisLambrecht
    JorisLambrecht over 10 years ago

    Hello Mr. Beckett,

    yes, the calculation of the number of fingers occurs automatically when entering the total width and leaving the finger width unchanged.

    But apparently the results are not identical at all.

    I am using version 4.0.

    Kind regards,

    Joris

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 10 years ago

    Joris,

    Not sure in that case - I'd have to do a detailed analysis, which to be honest, I don't have the bandwidth to do right now. Almost certainly a quirk in the modelling for an artificial process...

    Kind Regards,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • JorisLambrecht
    JorisLambrecht over 10 years ago

    Hello Mr. Beckett,


    thanks for the replies and the help.


    Kind Regards,

    Joris

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information