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stb analysis in extracted netlist

Hello,

I would like to know as to how do we run stb analysis by inserting a iprobe or cmdmprobe into the extracted netlist obtained from the layout of a schematic design. I do not want to bring pins out of the schematic so that I can insert the iprobe or cmdmprobe on a extracted view. Please let me know.

Regards,

Uzzy

Frank Wiedmann over 10 years ago

Cadence Solution 20267964 (http://support.cadence.com/wps/mypoc/cos?uri=deeplinkmin:ViewSolution;solutionNumber=20267964) answers exactly this question.
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Andrew Beckett over 10 years ago

Frank,

Thanks for directing people to my solution on this - you beat me to it!

Regards,

Andrew.
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uzzymoh over 10 years ago

Thanks for the solution. Works great.
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