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extract gate level netlist from layout

Presley

Hi everyone,

My work is based on gate level netlist but I only have layout in hand, I was wondering is it possible to parse the layout since I didn't see any useful information generated with layout (like .oa file, GDSII file ....)

BTW, is there any tool can make it? 

Thanks,

Presley

  • Hi Presley

    It is possible to generate a gate-level netlist as follows:

    a. Since you only have layout data, we will have to run PVS ERC instead of PVS LVS to generate an input database for Quantus
    b. Use Quantus to generate a SPEF or DSPF gate level netlist. In Quantus input form or cmd file, please set SPEF or DSPF as the output format and specify the target gate cells in the SPEF/DSPF cell list.

    Best regards
    Quek

  • Hi Quek,

    Thank you so much for your reply, I will have a try right now.

    Best Regards,

    Presley

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