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  3. ADE-XL: How to force individual result directories for each...

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ADE-XL: How to force individual result directories for each Monte Carlo point?

dontpanic
dontpanic over 10 years ago

Hi! I am having an issue with the way ADE-XL (6.1.6-64b.500.11) is treating the results directories when running Monte Carlo simulations.

I have in my testbench a custom VA component that samples and dumps signals to the disk. For example, if I run a simulation in "Single run, sweeps and corners" mode with 3 corners, my dumped results are stored in the following directories and files:

[...]/[my_lib]/[my_cell]/adexl/results/data/Interactive.7/1/sch__noiseless/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/Interactive.7/2/sch__noiseless/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/Interactive.7/3/sch__noiseless/psf/myDumpedSimData/vOUTdiff.csv

The problem is when I switch to "Monte Carlo Sampling" mode. For instance, if I run 48 MC points for only 1 corner (and setting in my Job Setup options "Max. Jobs"=8), I see the following directories are being created:

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/1/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/1/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/7/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/7/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/13/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/13/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/19/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/19/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/25/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/25/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/31/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/31/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/37/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/37/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/43/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv
[...]/[my_lib]/[my_cell]/adexl/results/data/MonteCarlo.3/43/sch__noiseless/groupRunDataDir/psf/myDumpedSimData/vOUTdiff.csv~

So even though all the 48 MC points run without problems, ADE-XL is arranging/processing the results directories in a way that the files with the dumped signals are being overwritten, and in the end I am only left with 8 individual "vOUTdiff.csv" files (+8 old "vOUTdiff.csv~").

The root of the problem seems to be in the way the simulations are being launched, since in the individual spectre.out logs I see the warnings coming from my VA code messages about the files being overwritten (see attached excerpt below), and also that the MC points are being treated as "iterations".

How can I avoid this behavior, and force ADE-XL/spectre to keep the individual results directories for every MC point, while being able to run many MC points in parallel?

Thanks in advance for any help!

Cheers,

Jorge

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  • dontpanic
    dontpanic over 10 years ago
    Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
    Version 14.1.0.527.isr6 64bit -- 31 Mar 2015
    Copyright (C) 1989-2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

    [...]

    ************************************************
    Monte Carlo Analysis `mc1': iteration = (1 -> 6)
    ************************************************
    Important parameter values:
    seed = 1151
    sampling = standard
    variations = all
    firstrun = 1
    numruns = 6
    nullmfactorcorrelation = no
    donominal = yes
    method = standard


    **** Performing nominal run for `mc1'

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.
    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.

    [...]

    **** Performing monte carlo loop for `mc1'

    1 0.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre at iteration = 1 during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 84: I281: Overwriting file ../psf/myDumpedSimData/vOUTcm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTcm.csv~.
    Further occurrences of this warning will be suppressed.

    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 1 (0 %), step = 1 (0 %)
    2 20.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 84: I281: Overwriting file ../psf/myDumpedSimData/vOUTcm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTcm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I279: Overwriting file ../psf/myDumpedSimData/vRESp.csv. Saving old contents of file in ../psf/myDumpedSimData/vRESp.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 2 (20 %), step = 1 (20 %)
    3 40.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINm.csv. Saving old contents of file in ../psf/myDumpedSimData/vINm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 3 (40 %), step = 1 (20 %)
    4 60.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINm.csv. Saving old contents of file in ../psf/myDumpedSimData/vINm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 4 (60 %), step = 1 (20 %)
    5 80.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINm.csv. Saving old contents of file in ../psf/myDumpedSimData/vINm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions..
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 5 (80 %), step = 1 (20 %)
    6 100.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 84: I281: Overwriting file ../psf/myDumpedSimData/vOUTcm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTcm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 6 (100 %), step = 1 (20 %)
    Total time required for montecarlo analysis `mc1': CPU = 39.1258 ks (10h 52m 6s), elapsed = 11.259 ks (3h 7m 39s).
    Time accumulated: CPU = 39.1608 ks (10h 52m 41s), elapsed = 11.4698 ks (3h 11m 10s).
    Peak resident memory used = 1.24 Gbytes.


    Aggregate audit (4:21:07 AM, Wed Sep 2, 2015):
    Time used: CPU = 39.2 ks (10h 52m 44s), elapsed = 11.5 ks (3h 11m 13s), util. = 341%.
    Time spent in licensing: elapsed = 49.1 ms.
    Peak memory used = 1.24 Gbytes.
    Simulation started at: 1:09:54 AM, Wed Sep 2, 2015, ended at: 4:21:07 AM, Wed Sep 2, 2015, with elapsed time (wall clock): 11.5 ks (3h 11m 13s).
    spectre completes with 0 errors, 48 warnings, and 24 notices.
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Reply
  • dontpanic
    dontpanic over 10 years ago
    Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
    Version 14.1.0.527.isr6 64bit -- 31 Mar 2015
    Copyright (C) 1989-2015 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, Virtuoso and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

    [...]

    ************************************************
    Monte Carlo Analysis `mc1': iteration = (1 -> 6)
    ************************************************
    Important parameter values:
    seed = 1151
    sampling = standard
    variations = all
    firstrun = 1
    numruns = 6
    nullmfactorcorrelation = no
    donominal = yes
    method = standard


    **** Performing nominal run for `mc1'

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.
    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.

    [...]

    **** Performing monte carlo loop for `mc1'

    1 0.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre at iteration = 1 during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 84: I281: Overwriting file ../psf/myDumpedSimData/vOUTcm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTcm.csv~.
    Further occurrences of this warning will be suppressed.

    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 1 (0 %), step = 1 (0 %)
    2 20.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 84: I281: Overwriting file ../psf/myDumpedSimData/vOUTcm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTcm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I279: Overwriting file ../psf/myDumpedSimData/vRESp.csv. Saving old contents of file in ../psf/myDumpedSimData/vRESp.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 2 (20 %), step = 1 (20 %)
    3 40.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINm.csv. Saving old contents of file in ../psf/myDumpedSimData/vINm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 3 (40 %), step = 1 (20 %)
    4 60.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINm.csv. Saving old contents of file in ../psf/myDumpedSimData/vINm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 4 (60 %), step = 1 (20 %)
    5 80.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINm.csv. Saving old contents of file in ../psf/myDumpedSimData/vINm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions..
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 5 (80 %), step = 1 (20 %)
    6 100.00%

    ***************************************************
    Transient Analysis `tran': time = (0 s -> 136.5 ns)
    ***************************************************
    Finding DC approximate solution failed. Try again with try_fast_op set to no.

    Warning from spectre during IC analysis, during transient analysis `tran', during Monte Carlo analysis `mc1'.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: I281: Overwriting file ../psf/myDumpedSimData/vOUTp.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTp.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 74: I281: Overwriting file ../psf/myDumpedSimData/vOUTm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 80: I281: Overwriting file ../psf/myDumpedSimData/vOUTdiff.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTdiff.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 84: I281: Overwriting file ../psf/myDumpedSimData/vOUTcm.csv. Saving old contents of file in ../psf/myDumpedSimData/vOUTcm.csv~.
    WARNING (ASL-3218): "[my_custom_VA_component]/veriloga/veriloga.va" 73: sample2disk__vIN: Overwriting file ../psf/myDumpedSimData/vINp.csv. Saving old contents of file in ../psf/myDumpedSimData/vINp.csv~.
    Further occurrences of this warning will be suppressed.

    Trying `homotopy = gmin' for initial conditions.
    Trying `homotopy = source' for initial conditions.
    Trying `homotopy = dptran' for initial conditions.
    [...]
    finalTimeOP: writing operating point information to rawfile.
    modelParameter: writing model parameter values to rawfile.
    element: writing instance parameter values to rawfile.
    outputParameter: writing output parameter values to rawfile.
    designParamVals: writing netlist parameters to rawfile.
    primitives: writing primitives to rawfile.
    subckts: writing subcircuits to rawfile.
    mc1: iteration = 6 (100 %), step = 1 (20 %)
    Total time required for montecarlo analysis `mc1': CPU = 39.1258 ks (10h 52m 6s), elapsed = 11.259 ks (3h 7m 39s).
    Time accumulated: CPU = 39.1608 ks (10h 52m 41s), elapsed = 11.4698 ks (3h 11m 10s).
    Peak resident memory used = 1.24 Gbytes.


    Aggregate audit (4:21:07 AM, Wed Sep 2, 2015):
    Time used: CPU = 39.2 ks (10h 52m 44s), elapsed = 11.5 ks (3h 11m 13s), util. = 341%.
    Time spent in licensing: elapsed = 49.1 ms.
    Peak memory used = 1.24 Gbytes.
    Simulation started at: 1:09:54 AM, Wed Sep 2, 2015, ended at: 4:21:07 AM, Wed Sep 2, 2015, with elapsed time (wall clock): 11.5 ks (3h 11m 13s).
    spectre completes with 0 errors, 48 warnings, and 24 notices.
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