Found a bug of system function $fwrite in verilog A

When I was using $fwrite to save the data generated during simulation, there are some unexpected 0s in the txt file. But in the Virtuoso Visualization tool, there are no any 0s.

The code is $fwrite(fp,"%f \n",Newout)

Then I write a test function, which is

// VerilogA for ADC, VerilogBugTest, veriloga

`include "constants.vams"
`include "disciplines.vams"

module VerilogBugTest(clk,Dout);
input clk;
output Dout;

voltage clk;
voltage Dout;
real Data;
integer fp;
analog begin
      @(initial_step) begin
            Data = 0;
            fp = $fopen("/users/mingliang/tsmcoa018BCD/ADC_Idealblock/VerilogABugTest.txt","a");
      end
      @(cross(V(clk)-0.9,+1)) begin
            Data = Data + 1;
            $fwrite(fp,"%f \n",Data);
      end
      V(Dout)   <+ transition(Data,0.5p,0.5p);
end

endmodule

The result shown in the Virtuoso Visualization tool is 

I also exported the data written by the system function $fwrite and plot it in the Matlab.

There are two 0s !.

Is these a bug of Verilog A or Is there something wrong in my verilog A code?

Best regards,

Biasing