Running corners in ADEXL and calculating output expressions

Hello,

I'm running simulations across corners using ADEXL and defined a few output expressions in ADE XL Test Editor. I'm saving the "vds" and "vdast" of some transistors in the "tran" simulations using "save" statements in a file (filename.scs) defined as a "Definition File" under "Simulation File" of ADE XL Test Editor.

First observation:

Some of the transistors, which I need to save their vds and vdsat, are inside the elements of an array of these elements. To save the vds and vdsat of these devices, I checked the netlist generated by ADEXL to see how they appear in it. To my surprise, these array elements sometimes show up in a form as "save I124.I25.I1_4.Mn10:vds" and some other times as "save I124.I25.I1\<4\>.Mn10:vds". To resolve this, I put two expressions in either form for each array element's parameter in filename.scs. I am wondering why this happens.

Second observation:

I have defined output expressions in the following forms using ADE XL Test Editor:

value(v("I124.I25.I1_4.Mn11:vdsat" ?result "tran") Ts)

value(v("I124.I4.Mn11:vdsat" ?result "tran") (Ts + (0.8 * Tck)))

Variables Ts and Tck are defined as Design Variables in Corners Setup window of ADEXL.

If I select only one corner and run one simulation, the expressions are correctly calculated. However, if I select two or more corners and run simulations, I receive evaluation error for some (or all) of the expressions in both formats mentioned above. Would you please help me resolve this issue?

Thank you,

-Alireza