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Output expressions containing variables and parameters not executed when using ADE XL

Chevelle70

Hi,

I am running transient simulations using APS in ADE XL environment across multiple corners.

I have set output expressions in ADE XL Test Editor in the forms shown below:

value(v("I124.I4.Mp60:vds" ?result "tran") Ts)

value(v("I124.I4.Mp57:vds" ?result "tran") (Ts + (0.8 * Tck)))

Where "Ts" value, corner dependent, and "Tck", corner independent, are both set as Design Variable in the Corners Setup window.

I am receiving eval err with the error messages such as the following:

*Error* ("eval" 0 t nil ("*Error* eval: unbound variable" Tck))

*Error* ("eval" 0 t nil ("*Error* eval: unbound variable" Ts))

Could you please help as how we can define variables and parameters in the output expressions, as shown above, when running simulations (single or multiple corners) in ADEXL?

Thank you,

-Alireza

Parents
  • AlbertoLopez

    Hello all, 

    I am having the same issue, but it is not solved. I created the following expressions on the ADE Assembler outputs:

    t1 --> VAR("retraso")

    t2  --> (VAR("retraso") + (VAR("step")))

    retraso and step are design variables and they are properly defined.

    *Error* ("plus" 0 t nil ("*Error* plus: can't handle (nil + nil)"))

    *Error* Evaluating expression ((VAR("retraso") + VAR("step"))).

    *Error* ("eval" 0 t nil ("*Error* eval: not a function" VAR("step")))

     

    Thanks in advance

Reply
  • AlbertoLopez

    Hello all, 

    I am having the same issue, but it is not solved. I created the following expressions on the ADE Assembler outputs:

    t1 --> VAR("retraso")

    t2  --> (VAR("retraso") + (VAR("step")))

    retraso and step are design variables and they are properly defined.

    *Error* ("plus" 0 t nil ("*Error* plus: can't handle (nil + nil)"))

    *Error* Evaluating expression ((VAR("retraso") + VAR("step"))).

    *Error* ("eval" 0 t nil ("*Error* eval: not a function" VAR("step")))

     

    Thanks in advance

Children
  • Andrew Beckett
    in reply to AlbertoLopez

    Would have been better to start a new thread (As the forum guidelines suggest), but anyway it would be useful to know:

    1. Which IC subversion are you using (Help->About will tell you)
    2. Are there global variables with the same name defined, or just design variables under the test? Are the global variables enabled if so?
    3. Are the output expressions using VAR for the same test where the design variables are defined?

    Andrew.

  • AlbertoLopez
    in reply to Andrew Beckett

    Hello Andrew, 

    1- Cadence IC6.1.7-64b-500.15
    2-No global variables, just a few of design variables

    3- I have only one test, so all the output expressions are belonging to the same test.

    Thanks for the quick answer

  • Andrew Beckett
    in reply to AlbertoLopez

    Hi Alberto,

    I just tried this in the same sub-version as you,  and it worked fine for me. I suspect there's some subtle problem in the setup that I can't see from your description.

    The best thing would be to contact customer support and then we can look at your data?

    Regards,

    Andrew.

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