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Post-simulation error

tahm

Dear all,

In my schematic and layout, I use 2 same components (rpoly2,Lib PRIMLIB, tech AMS0.35). And, when I create the av-extracted view with QRC ASSURA, this specific component model become another model ( rpoly2c, it is the same model with parasitics capacitances to substrate). So, when I perform the post-layout simulation as follows. - I create the schematic view of the circuit testbench. - I create the config view by choosing the tool Hierarchy-Editor and then by choosing Use Template and Spectre, I have the following error :

" ERROR (OSSHNL-915): Cannot generate the netlist because instance 'I0|R2' with place master 'PRIMLIB/rpoly2c/auLvs',
and another instance with place master 'PRIMLIB/rpoly2c/auLvs', are bound to the same switch
master 'PRIMLIB/rpoly2c/schematic'. This can result in the generation of an incorrect netlist.
To generate the correct netlist, apply occurrence binding to one of the
instances of the switch master using Hierarchy Editor. To override this error
and continue with netlist generation, set 'hnlHandleMultiplePlaceMaster' to
'ignore' in the '.cdsinit' or '.simrc' file. In this case, the generated
netlist can be incorrect if the place masters have different representations,
such as different bus orders. "

I don't understand this error message. Can someone explain me this message?

How to apply occurrence binding to one of the instances of the switch master using Hierarchy Editor?

Thanks in advance,

Tahm

Parents
  • tahm
    Hi all,

    To specify more my problem :

    For every resistor model of the AMS C35 process design kit , for instance "rpoly2" : there are the "rpoly2" model and a "rpoly2c" model.

    "Rpoly2c" (in schematic view) is with 3 terminals (plus,minus and Ref) and it is made by 2 "rpoly2" instances (in spectre view) and 3 capacitances "Cs0", "Cm" and "CS1" ( parasitic capacitances in spectre view).

    I use in my schematic and layout circuit views the "rpoly2" model. And when I do an extraction (with Assura QRC), I obtain in my extracted view all components in auLVS view with parasitcs, and the "rpoly2" resitor model became "rpoly2c" in auLVS view in the design av_axtracted view .
    Knowing that I use more than 2 same model resistor in my design circuit, for example 2 "rpoly2", and that i perform postsimulation using Spectre template in Hierarchy Editor to obtain the config view.

    In my Hierarchy Editor Editing window, all components are in spectre view expect the design circuit extracted in av_extracted view and the design circuit test in schematic view (witch seems me correct). Adding to this, "rpoly2c" is in schematic view and it is instantiated to resistor name (I0|R2) in circuit ( example : right click mouse=> explain=>instantiations => (Project Charge_Amp av_extracted):I0|R2 , Project Charge_Amp av_extracted):I1|r59 ). And rpoly2 is in spectre view and it is instantiated to the schematic view of rpoly2c ( exemple : right click mouse=> explain=> instantiations => (PRIMLIB rpoly2c schematic): R1 , (PRIMLIB rpoly2c schematic): R2)
  • shankhour
    in reply to tahm

    Hello Mohammed

    Did you find the solution of your problem ? I have the same mistake.

    Best Regard

Reply
  • shankhour
    in reply to tahm

    Hello Mohammed

    Did you find the solution of your problem ? I have the same mistake.

    Best Regard

Children
  • Andrew Beckett
    in reply to shankhour

    You need to use occurrence bindings - this normally happens if there are two different masters instantiated in the design hierarchy, and this can cause trouble if the pin out is different. So for the cells it is complaining about, switch the tree view in the config to "occurrence" mode and then set the bindings the way you want:

    Regards,

    Andrew

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