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  3. Issues with vector stimulus and spectre

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Issues with vector stimulus and spectre

itos
itos over 8 years ago

Hi,

Yesterday a friend told me about the VEC file option for spectre. It looks great! But now I spent many hours to get a simple shift register to work but I get unreliable results. Sometimes it works, sometimes not and by just making minor changes (e.g. adding a flip flop to the register) makes completely unpredctable results. This is one of my stimulus files:

radix 1 1 4 4 4 4 4 4 1
io i i i o
vname RST LOAD D<0:3> D<4:7> D<8:11> D<12:15> D<16:23> OUT
tfall 0.01
trise 0.01
vih 1.0
vil 0.0
voh 1.0
vol 0.0
tunit 1ns
; t     RST     LOAD    D1      D2      D3      D4      D5      D6      OUT
0       1       0       F       0       0       0       0       0       x
10      0       0       F       0       0       0       0       0       x
30      1       1       F       0       0       0       0       0       x
50      1       0       F       0       0       0       0       0       x

First and most importantly, do I understand correctly that an ideal voltage source with source resistance 10mOhm is connected to all the listed nodes (e.g. D0, D1, D2, ..., D23) and are either made 1V or 0V?

How can it then come that there are nodes (D4, D5) which go into a transistor gate and are 550mV?? I tried making "outz 0.000000001" (basically zero), so no matter what the circuit does (even if it's not a gate) there is no way this node can ever be 550mV. All lines D0 - D23 go into eactly the same cell (a 1:2 MUX) and two of them are just 550mV. This makes zero sense to me!

Furthermore I get unpredictable results when I use radix 8, 16, 21, 32. So I ended up splitting them into D<0:3> D<4:7> D<8:11> D<12:15> D<16:23>. Not nice. The manual says "alid vector sizes include 1 (binary), 2, 3 (octal), or 4 (hexadecimal)." which implies to me 16 or 32 or 21 would also be valid.

For example,

radix 1 1 16 1
io i i i o
vname RST LOAD D<0:15> OUT

gives the error

Error found by spectre during Digital Vector read-in.
    ERROR (USIMPRS-17704): The number of names do not match the number of vectors. Change the number of names to match the number of vectors and run the simulation again.
        
        **** Statement details for above warning or error ****
         Statement: vname RST LOAD D<0:15> OUT
         File Name: test1.vec
         Line Number: 3
        **** End of Statement details ****

But radix 8 works (which is not explicitely listed in the manual either). I would not see why 8 would work but not 16, 24 or 32.

On the other hand,

radix 1 1 111111111111111111111 1
io i i i o
vname RST LOAD D<0:20> OUT
tfall 0.01
trise 0.01
vih 1.0
vil 0.0
voh 1.0
vol 0.0
tunit 1ns
0       0       0       111111111111111111111   0

gives no error but the results make no sense (see above - 550mV although pin is only connected to a MOS gate).

Since the whole thing is so unpredicable I would like to know if this syntac is definitely valid or if it just results in unpredicted behavior without explicitely raising an error.

Any help would be greatly appreciated!

(Spectre  16.1.0.187.isr1 64bit -- 8 Dec 2016)

(a complete example that fails is hard to provide because first it includes proprietory standard cells and second it works perfectly with - say 4 flip flops - but just adding 5 messes up all results in a weird way ...)

(Using vdc and vpulse seems to work as well)

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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    The documentation is a bit poor for this - it's on my to-do list to file a CCR to get this improved, plus some enhancement requests. The radix can only be 1, 2, 3 or 4 - which means each digit is either 0/1, 0-3, 0-7, or 0-F. If you want more than one digit, you repeat the radix. For example:

    radix 1 1 444444 1
    io i i i o
    vname RST LOAD D<0:23> OUT
    tfall 0.01
    trise 0.01
    vih 1.0
    vil 0.0
    voh 1.0
    vol 0.0
    tunit 1ns
    ; t RST LOAD D0...23 OUT
    0 1 0 F00000 x
    10 0 0 F00000 x
    30 1 1 F0000F x
    50 1 0 ABCDEF x

    However, even with this, something is not quite right:

    //

    vec_include "forum.vec"

    R0 (D0 0) resistor r=1k
    R1 (D1 0) resistor r=1k
    R2 (D2 0) resistor r=1k
    R3 (D3 0) resistor r=1k
    R4 (D4 0) resistor r=1k
    R5 (D5 0) resistor r=1k
    R6 (D6 0) resistor r=1k
    R7 (D7 0) resistor r=1k
    R8 (D8 0) resistor r=1k
    R9 (D9 0) resistor r=1k
    R10 (D10 0) resistor r=1k
    R11 (D11 0) resistor r=1k
    R12 (D12 0) resistor r=1k
    R13 (D13 0) resistor r=1k
    R14 (D14 0) resistor r=1k
    R15 (D15 0) resistor r=1k
    R16 (D16 0) resistor r=1k
    R17 (D17 0) resistor r=1k
    R18 (D18 0) resistor r=1k
    R19 (D19 0) resistor r=1k
    R20 (D20 0) resistor r=1k
    R21 (D21 0) resistor r=1k
    R22 (D22 0) resistor r=1k
    R23 (D23 0) resistor r=1k

    tran tran stop=60n

    I don't see D4-D7 showing a "B"...

    Probably you should contact customer support. I don't know why you would be getting 550mV.

    Ah, I think I know why. You have to have an i or o in the io line for every digit. So the above should be:

    radix 1 1 444444 1
    io i i iiiiii o
    vname RST LOAD D<0:23> OUT
    tfall 0.01
    trise 0.01
    vih 1.0
    vil 0.0
    voh 1.0
    vol 0.0
    tunit 1ns
    ; t RST LOAD D0...23 OUT
    0 1 0 F00000 x
    10 0 0 F00000 x
    30 1 1 F0000F x
    50 1 0 ABCDEF x

    Now it seems to behave for me.

    I will file that CCR when I have a moment!

    Andrew.

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  • itos
    itos over 8 years ago
    Hi Andrew,

    Wow, that explains a lot of unexpected behavior (and why it started working when I decided to leave "OUT" - seems spectre silently filled the "iiiii" in that case).

    I would have never guessed!

    Thanks!
    And thanks for filing the CCR.
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  • Mdad
    Mdad over 3 years ago in reply to Andrew Beckett

    Hi Andrew

    So I still see similar problem. For the following vector file:

    radix 1 4

    io i i
    hier 0
    vname clk bink<3:0>
    tunit ns

    trise 0.01

    tfall 0.01

    vih 0.7

    vil 0.0

    ; t clk bink
    0 0 0
    1 1 A
    2 0 1
    3 1 B
    4 0 0
    5 1 F

    clk signal works fine but bink<3:0> do not generate any input signals.  But when I make bink like one bit then it works. Something like this:

    radix 1 1 1 1 1

    io i i i i i
    hier 0
    vname clk bink<3> bink<2> bink<1> bink<0>
    tunit ns

    trise 0.01

    tfall 0.01

    vih 0.7

    vil 0.0

    ; t clk bink
    0 0 0 0 0 0
    1 1 1 0 1 0
    2 0 1 1 0 0
    3 1 0 1 1 1
    4 0 0 0 1 0
    5 1 1 0 1 0

    Then it works.

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  • Andrew Beckett
    Andrew Beckett over 3 years ago in reply to Mdad

    The forum guidelines ask you not to post on the end of old threads - so please in future create a new post (you can always add a link to an old thread if there's a useful reference).

    With 

    vname clk bink<3:0>

    then the signals generated will be called bink3, bink2, bink1, bink0 (I checked with your file). If you want them to be called bink<3>, bink<2> etc, then change the line to:

    vname clk bink<[3:0]>

    Andrew

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