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  3. Developing custom SPICE compatible transistor model

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Developing custom SPICE compatible transistor model

farhan89
farhan89 over 8 years ago

I am trying to develop a simple transistor model in which I could just vary drain-source and gate-source voltage and calculate the drain current. I have drain current equation as well as the parameters values on which it is dependent. Can I write my own SPICE model (without any .MODEL statement) with this information and run it with spectre/hspice in ADE ?. Any examples for such models ?

Farhan

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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    Farhan,

    You could use Verilog A for this. You might look at some examples on  

    although these will generally be more complicated than what you're suggesting. 

    Andrew.

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  • farhan89
    farhan89 over 8 years ago
    Thank you Andrew

    Yeah I can develop it in Verilog-A but then I am not sure if I would be able to integrate/co-simulate verilog-a and simulink model (separate transistor capacitances model) with spectre?. Is is possible

    Farhan
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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    You can co-simulate between spectre and simulink or AMS Designer and Simulink. Both spectre and AMS Designer can use Verilog-A models, so there's no more of an integration challenge than there is if you use a SPICE model in Spectre and co-simulate with Simulink.

    Regards,

    Andrew.

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  • farhan89
    farhan89 over 8 years ago
    Thank you for your quick response and explanation :)

    Farhan
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  • farhan89
    farhan89 over 8 years ago
    just for the knowledge could you please tell me why it would be difficult to co-simulate SPICE in spectre with simulink. due to compatibility issue ?

    P.S: sorry for 2 separate replies
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  • Andrew Beckett
    Andrew Beckett over 8 years ago

    I don't understand the question. You can simulate SPICE models in spectre and co-simulate with Simulink. I didn't say that it would be difficult - this is something that is supported and documented. I just said it would be no more of a challenge to simulate VerilogA models in spectre and co-simulate with Simulink, that's because whether you use VerilogA models or SPICE models or spectre models in spectre has no impact on co-simulation.

    Andrew.

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  • farhan89
    farhan89 over 8 years ago
    Ohh sorry. I misunderstood it.
    Anyways, we will develop SPICE (standard for device modeling) and Verilog-A model side by side and integrate both in our PDK.
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  • SHASHANK PATHAK
    SHASHANK PATHAK over 5 years ago in reply to Andrew Beckett

    Hey Andrew,

    Can you help me with a problem.

    How to change Hspice (.lib) model file of GNRFET to candece (Virtuoso compatible.) file.

    Thanks in advance.

    SHASHANK 

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  • Andrew Beckett
    Andrew Beckett over 5 years ago in reply to SHASHANK PATHAK

    Hi Shashank,

    Nobody ever seems to read the Forum Guidelines, unfortunately. So this shouldn't be on the end of another post which is only loosely related (I don't know what this GNRFET model is, or how it is implemented; maybe it's a Verilog-A model?) but a fresh post.

    In general you can use HSPICE model files directly in Spectre (there's no tool called "Cadence" or even "candece") without needing to change them.

    However, it rather depends on what's in the model file. You don't give any context or detail to your question.

    Andrew.

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