Stats

  • Locked Locked
  • Replies 4
  • Subscribers 126
  • Views 25032
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How to reduce time needed before transient simulation to be started in case of large circuit

P Chy

Hi,

I have to run transient simulation for a very large circuit. But every time, before starting transient simulation( simulation for different times), it is taking a significant amount of time to find DC solution. I have set up "Initial Condition Parameter" of transient simulation as follows:

ic: all, skipdc: no, readic: spectre.ic; also i tried, readic:spectre.fc. But both of them, don't help to reduce the simulation time for DC convergence. Can you please help me on this aspect? And another question: What's the difference between spectre.ic and spectre.fc files and which one should be appropriate for readic field?

Program: @(#)$CDS: virtuoso version 6.1.6-64b ,Sub version: sub-version IC6.1.6-64b.500.1

Parents
  • P Chy

    Hi Andrew,
    Here i see that i am using following simulator:
    Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
    Version 12.1.1.048 64bit (found from input.log file)

    Now i have several questions:
    1. you said that for transient simulation i need to set up readns="spectre.ic"(leave skipdc=no, readic blank), but at that time, i also need spectre.dc file. I don't know why this spectre.dc file is needed and how? because in transient simulation options, i don't see any field like readns, readic where i would use spectre.dc file.

    2.If i assume that spectre.dc file is needed for rapid DC convergence during transient simulation, at that time, do i have to run dc simulation before transient simulation? because i see, there is a field" write" in option of dc simulation which would produce spectre.dc file. And what's the difference between spectre.dc and spectre.ic files? Do they contain same information?

    3.Actually, i have to simulate large image read circuit of different columns. Every column contains same circuit diagram and same number of transistors. So circuit containing 256 columns is just bigger than circuit containing 64 columns, but every column includes same circuit diagram. So at that time, if i use spectre.ic (found from circuit containing 64 columns) in readns of bigger circuit (circuit containing 256 columns) during transient simulation, will this trick help to reduce DC convergence time, (although some extra nodes will be added to the second bigger circuit)?


    4. Can you please explain (your last point) in more details about how to find out the reasons of taking too much time for DC convergence? sorry, i couldn't get it.

Reply
  • P Chy

    Hi Andrew,
    Here i see that i am using following simulator:
    Cadence (R) Virtuoso (R) Spectre (R) Circuit Simulator
    Version 12.1.1.048 64bit (found from input.log file)

    Now i have several questions:
    1. you said that for transient simulation i need to set up readns="spectre.ic"(leave skipdc=no, readic blank), but at that time, i also need spectre.dc file. I don't know why this spectre.dc file is needed and how? because in transient simulation options, i don't see any field like readns, readic where i would use spectre.dc file.

    2.If i assume that spectre.dc file is needed for rapid DC convergence during transient simulation, at that time, do i have to run dc simulation before transient simulation? because i see, there is a field" write" in option of dc simulation which would produce spectre.dc file. And what's the difference between spectre.dc and spectre.ic files? Do they contain same information?

    3.Actually, i have to simulate large image read circuit of different columns. Every column contains same circuit diagram and same number of transistors. So circuit containing 256 columns is just bigger than circuit containing 64 columns, but every column includes same circuit diagram. So at that time, if i use spectre.ic (found from circuit containing 64 columns) in readns of bigger circuit (circuit containing 256 columns) during transient simulation, will this trick help to reduce DC convergence time, (although some extra nodes will be added to the second bigger circuit)?


    4. Can you please explain (your last point) in more details about how to find out the reasons of taking too much time for DC convergence? sorry, i couldn't get it.

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.