• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. vcvs Impedance Dips in Frequency

Stats

  • Locked Locked
  • Replies 4
  • Subscribers 125
  • Views 18036
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

vcvs Impedance Dips in Frequency

ChrisDG
ChrisDG over 8 years ago

Hello,

I am trying to create a near ideal voltage buffer using the components of analogLib. I have tried using vcvs and other controlled sources. All these perform the function correctly but always have sharp frequency spikes and dips in the input and output impedances. I can understand if the spikes are insignificant but some of these come to around 90% of the maximum impedance value so when placed in actual circuits it affects the performance at these frequency notches. I have tried using feedback Rs and Cs but they don't seem to help.

Attached below is one example of vcvs under 2port SP analysis where Z11 is shown.

The port settings are:

Port1: Resistance=50ohm; SourceType=Sine; PortNum=1

Port2: Resistance=50ohm; SourceType=DC; PortNum=2

Simulator: Spectre
SP Analysis: 10M 10GHz ; Single-Ended

Wondered if anyone could recommend a solution.

Thanks.

Chris

  • Cancel
Parents
  • Andrew Beckett
    Andrew Beckett over 8 years ago

    Chris,

    That looks like a numerical artefact given the size of the impedances. Can you do two things (to make it easier for a lazy person like me to test):

    1. Tell me exactly which spectre subversion you're using (this should be at the top of the log file, or what "spectre -W" reports)
    2. Post the input.scs from ADE so that I don't have to re-enter the schematic...

    Thanks,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Reply
  • Andrew Beckett
    Andrew Beckett over 8 years ago

    Chris,

    That looks like a numerical artefact given the size of the impedances. Can you do two things (to make it easier for a lazy person like me to test):

    1. Tell me exactly which spectre subversion you're using (this should be at the top of the log file, or what "spectre -W" reports)
    2. Post the input.scs from ADE so that I don't have to re-enter the schematic...

    Thanks,

    Andrew.

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information