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Back Annotation of Segmented Resistors

snee

We have a situation where a single resistor device is placed in a schematic. Then in layout, the designer segmented the resistor into two series resistors. The device has a CDF parameter called "Segments" which has been set to 2.

LVS is clean and we can extract a DSPF via Cadence QRC.

When the DSPF is then ran in Specter sim, we do not get 100% back annotation because the Spice NL from the schematic does not contain the extra resistor and series Net present in the DSPF.

Has anyone ran into this issue? If so how did you resolve it without post processing the DSPF?

Shane.

  • Andrew Beckett

    Hi Shane,

    If you are simulating the DSPF by including the DSPF from the Setup->Simulation Files form, then there's no "back annotation" involved. That's the recommended route, rather than using stitching (the UI for which is under an environment variable, because it's not the preferred option). How are you including the DSPF? 

    Since DSPF includes the devices, there's really no need to do stitching; historically this was needed for FastSPICE technology because they did their partitioning using the pre-layout devices. However, Spectre/APS doesn't need this and nor does XPS.

    Regards,

    Andrew.

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