How to set Vref of Opamp in adhLib

Hi, 

You should read the verilogA of the block to see how it is modeled and how to make it works. 

Yes. Thank. I simulated it on Spice, and I see it works. So I think it maynot work on Cadence.

Your circuit is connected up incorrectly. You have the vspply_n pin of the opamp connected to VSS but it should be VCC. VSS is 0V in your case, and VCC is -3.

The model has soft limiting at the supplies, so that's why it's limiting the negative values (because you didn't have a negative supply).

Andrew.

Hi. I mean is using single supply for opamp. So that why I connect to VSS.

In Spice, there is one support single supply opamp, so I can cut negative input voltage. 

it means that Cadence doesnot support single supply opamp.

is it right? So how can I get single supply opamp in Cadence?

Thanks. 

It's still not clear what you want, and after this response I'm giving up trying to guess. The behaviour is dependent upon the soft limiting in the opamp; if you don't like that, you can change the model (rewrite it; it's VerilogA, so you copy the opamp and alter the code). So it's not a matter of "Cadence" (there's no tool called Cadence) not supporting "single supply opamp"; you can model whatever you like, and probably adjust the parameters of even this opamp model to suit your needs, if you know what your needs are.

For example, if I leave the supplies as VSS and VDD, and just change the vsoft parameter on the instance of the opamp to (say) -5 (something lower than the default value of 0.5), then that turns off the soft limiting for this range of input voltage.

Regards,

Andrew.

Hi. This is What I want in Spice. with negative input voltage, the output is inverted. with positive input voltage, the ouput is zeros.

This is what I get in Cadence. 

It would have been easier if you'd explained that (and provided pictures) in the first place.

The main issue is that the opamp model in ahdlLib implements soft limiting - and the vsoft parameter inside the model defaults to 0.5V. If you set the value to 0, then you'll see the flattening, but that soft limiting kicks in at 0V and limits the output to slightly less than 0V - but the curve is broadly what you want. I'm sure you could play with the other parameters (look at the model code to see what it is doing) to make that limit closer to 0.

You could always just use a vcvs (voltage controlled voltage source) from analogLib with some limits set on that:

This produces exactly the response you want - limiting at 0 V

Regards,

Andrew.