Library Re-characterization Guide

define_template command is need for all characterisations. this has nothing to do with Spice simulation, as the saved Spice deck will not be re-used.

Again, the slew/load index should be pre-defined. Each library hay has its own slew/load table, depending on the design and cell behavior. if you use -auto_index option, Liberate can auto-calculate the slew/load based on min/max_transition and min output capacitance specified by users. The slew/load values for all Spice simulations come from the define_template. 

Hi, let me elaborate my question a bit. 

I understand that slew/load values do come from the template file. Infact for a new cell library from the scratch, I know these slew values have to be measured against their capacitive loads in spice simulation (manually) and then state them in the template file. 

Now supposed we have a library already available for 1V VDD (.lib), which needs to be re-characterized for let's say 0.6 VDD. Liberate can also generate a template file from an existing library as far as I know which includes the original slew/loads for 1V lib. If we use this template for re-characterization, I think the slew values need to be updated as VDD is now going to be 0.6. Am I right ?

Since I do not have access to transistor level information of these cells, re-calculation of slew values (manually for 0.6 VDD) is not possible. So in such a situation, can I use the auto_index option ?

Thanks

Anuradha

with -auto_index option, Liberate uses min/max_transition values defined by user to calculate the index table. 

With multiple corners, min/max_transition values can be defined either individually for each corner, or with a single value to cover the full range.  

Hi, I have the same question as you. Did you know how to set the input slew and capacitance for other voltage? Do you know the principle of the defining slew and capacitance?

Hope to receive your reply.

Thanks,

fengye

Hi, is this for a new standard cell library or you want to introduce custom cells to an existing one ? 

1. If the latter is the case then you can go with the existing template data for slew/capacitance matrices. 

2. If it's a new standard cell library, then the minimum slew is the output slew of the fastest inverter (highest driving strength) when it's driving the smallest inverter. Corresponding min. capacitance is the input capacitance of this smallest inverter. Typically for most standard cells of same driving strength (i.e. INV1X, AND1X) have fairly similar slew/load combinations as the PMOS/NMOS devices of the output stage of these cells are equally ratioed ! In my case, it's was the first scenario. Note that libertry models do not support non-conventional logic styles (i.e. transmission gates), so what I state here is only valid for standard CMOS !

Anuradha

Hi, is this for a new standard cell library or you want to introduce custom cells to an existing one ? 

1. If the latter is the case then you can go with the existing template data for slew/capacitance matrices. 

2. If it's a new standard cell library, then the minimum slew is the output slew of the fastest inverter (highest driving strength) when it's driving the smallest inverter. Corresponding min. capacitance is the input capacitance of this smallest inverter. Typically for most standard cells of same driving strength (i.e. INV1X, AND1X) have fairly similar slew/load combinations as the PMOS/NMOS devices of the output stage of these cells are equally ratioed ! In my case, it's was the first scenario. Note that libertry models do not support non-conventional logic styles (i.e. transmission gates), so what I state here is only valid for standard CMOS !

Anuradha