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Vector files and verilog ams modules

mhkvy4

I have made a verilogams module for a 2 to 4 decoder where both the input and output buses are logic disciplines. I then made a test bench for the module which consisted of a verilog a model of a counter some vpulse sources and it was working.

I was wondering if a verilog ams module can use a vector file as a stimulus with connectlib files selected to determine the logic levels. So far it doesn't seem to be working. Can vec files only work with actual device circuit models or do they work with functional and verilog ams

 

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  • mhkvy4

    sorry mods can move this post to the Mixed Signal design forum.

    thanks 

  • Andrew Beckett
    in reply to mhkvy4

    I won't bother moving it - just as easy to answer here. Vector files (and VCD files) can only drive analog nets, not digital nets in a  mixed-signal simulation. You'd have to stick a resistor (say) between the net being driven by the vector file and the module with logic inputs.

    That's because the discipline resolution is not influenced by the presence of vector files, and so it wouldn't know to add a connect module instance (an interface element) on that net.

    Regards,

    Andrew.

  • mhkvy4
    in reply to Andrew Beckett

    Thanks, Andrew for the quick response. 

    Is the discipline resolution influenced by the presence of verilog A models and analog sources like a pwl source? If I use a connect module instance and just drive the decoder (with logic inputs) with just a voltage pwl source would that work? 

    Thanks for the help. 

  • mhkvy4
    in reply to Andrew Beckett

    I was playing around with it a bit more. Will it work if I attach resistors at the input and output buses like below? I am attaching my vector file as well. The waveforms I get are wrong. The inputs don't seem to change after every 10ns but seem to stay the same for the entire length of the simulation (0,0). I get the right output but was wondering why the inputs don't change. 

  • Andrew Beckett
    in reply to mhkvy4

    In the AMS log file, you'll have seen something like:

    Notice from spectre during topology check.
        Only one connection to the following 2 nodes:
            in<0>
            in<1>

    You need to use vname in[0] in[1] instead (i.e. square brackets) - then it would have worked.

    Andrew.

Reply
  • Andrew Beckett
    in reply to mhkvy4

    In the AMS log file, you'll have seen something like:

    Notice from spectre during topology check.
        Only one connection to the following 2 nodes:
            in<0>
            in<1>

    You need to use vname in[0] in[1] instead (i.e. square brackets) - then it would have worked.

    Andrew.

Children
  • Andrew Beckett
    in reply to Andrew Beckett

    Oh, and by the way, it's much better if you post the contents of a text file as text rather than as a screenshot. Then it saves anyone looking at this time because they don't have to re-type the contents...

    Andrew.

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