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QRC conflictiong name spaces

fmele

Hello,

I'm trying to generate an extracted view from a layout with QRC and, after selecting the LVS run to be extracted, I'm promped with the following message:

"You are about to enter names from conflicting name spaces
Do you want to continue?"

Either if I say YES or NO, I can see that there are some imprecisions in the extraction. Specifically, I have a poly1 plane in my layout, which typically is extracted with a huge capacitance toward the upper metals. Apparently this capacitance disappeared completely, without any additional warning from the CIW. The capacitance from the upper metal layers is simply reported to substrate (gnd), without considering the poly layer. This imprecision in the extraction is very critical as the poly-capacitance has a key role in my design - that's why I noticed the difference immediately - but I can't tell if there are any other problems with other layers.

Can anybody help me understanding what's going on, or can tell me what's the meaning of the warning message that appears when I launch the QRC?

Thank you,

Filippo

p.s.: I'm using Cadence IC6.1.5.500.132 and running the extraction with ASSURA 4.1_USR2_HF20 and Cadence Extraction QRC version 11.1.2-p106.

  • Saloni Chhabra

    Hi Filippo,

    Are you running selected nets extraction? Because that's when you would get the message for conflicting name space if:

    1. At the top of 'Extraction' tab, you choose Name Space e.g. Layout

    2. While choosing net names for selected net extraction, you try to select nets from 'Schematic'

    So, to avoid this warning, you should set consistent name space.

    Can you share your QRC command file? The version of QRC that you are using is very very old, but let's keep it like that for now.

    Also, any warnings related to QRC run will not show up in CIW, but in a log file that is generated by QRC in the run directory (qrc.<cellname>.log).

    Regards,
    Saloni

  • fmele
    in reply to Saloni Chhabra

    Hi Saloni,

    thank you for your help, I now fixed the "conflicting name spaces" warning as you explained. I was actually running the QRC-FS extraction on selected nets. The warning doesn't show up anymore. Also the Poly1 capacitance was somehow fixed (even if I don't realize how these two issues are related). Unfortunately I still have an issue, since the QRC is not reporting any capacitance from a huge metal rectangle toward an underlying nwell (they are connected to different nets, and I expect several hundreds of femtoFarads). Do you have any other hints?

    Here is the QRC command file, as you requested (this time without QRCFS).

    Best regards,

    Filippo

    #
    # OPTION COMMAND FILE created by Cadence Extraction QRC UI Version 11.1-p001
    #
    capacitance \
    -decoupling_factor 1.0 \
    -ground_net "gnd"
    extract \
    -selection "all" \
    -type "rc_coupled"
    extraction_setup \
    -array_vias_spacing auto \
    -max_fracture_length infinite \
    -max_fracture_length_unit "SQUARES" \
    -max_via_array_size \
    "auto" \
    -net_name_space "SCHEMATIC"
    filter_cap \
    -exclude_self_cap true
    filter_coupling_cap \
    -coupling_cap_threshold_absolute 0.001 \
    -coupling_cap_threshold_relative 1e-05
    filter_res \
    -min_res 0.001
    global_nets \
    -nets_file "/home/mele/cadence6/ASSURA_LVS/spx10c2_top_SHIELD_TG_RRES/qrc.GLOBAL.nets"
    input_db -type assura \
    -design_cell_name "spx10c2_top_SHIELD_TG_RRES layout wk_spx10" \
    -directory_name "/home/mele/cadence6/ASSURA_LVS/spx10c2_top_SHIELD_TG_RRES" \
    -format "DFII" \
    -library_definitions_file "/home/mele/cadence6/cds.lib" \
    -run_name "LVS"
    mos_diffusion_parameter_extraction \
    -res "fast"
    output_db -type extracted_view \
    -cap_component "pcapacitor auLvs PRIMLIB" \
    -cap_property_name "c" \
    -enable_cellview_check false \
    -include_cap_model "false" \
    -include_parasitic_cap_model "false" \
    -include_res_model "false" \
    -include_parasitic_res_model "false" \
    -include_parasitic_res_width false \
    -include_parasitic_res_width_drawn false \
    -postprocess_extracted_view "" \
    -res_component "presistor auLvs PRIMLIB" \
    -res_property_name "r" \
    -view_name "RCX_m35_mele_30x35_nwell"
    output_setup \
    -temporary_directory_name "LVS"
    process_technology \
    -technology_corner \
    "Typical" \
    -technology_library_file "/home/mele/cadence6/assura_tech.lib" \
    -technology_name "c35b4c3" \
    -temperature \
    -35

  • Saloni Chhabra
    in reply to fmele

    Hi,

    There's nothing in the command file that could explain the missing coupling cap, and it's unusual for an extractor to miss hundreds of fF. Are you getting any other Cc extracted to the net connected to nwell? Also, I assume none of these nets is a floating net. The default is to not remove any floating nets (atleast in EXT181) , but you could add filter_cap -exclude_floating_nets false to ensure.

    I'm afraid I can't guess much here. It will be quicker if you contacted Cadence customer support so someone can look at your layout and setup in a Webex session.

    Regards,

    Saloni

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