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Transient DC voltage setup

AllenD

Hi Team

I have attached 3 pictures concerning an issue of a spectre transient simulation. The first picture is what my test circuit looks like, which is in differential configuration. Each have 2 tones  and a DC value. The DC value are the same and 2 tones are 180 degree out of phase.   I marked the differential input with RED. then there is a pair of DC blocking caps. The voltage after it is marked as GREEN. 

The second picture showed that the the red plot is as what it should be: same DC and out of phase. But the circuit believe that two GREEN wires have different DC value initially and slowly get to its correct value. 

The third picture is the zoom in version of the second picture so it's clear the difference in DC valure  

I believe the cause of such plot is due to the initial voltage of the differential path are different. (in my case are RED at the begining ~470mV and ~463.5mV). This makes the circuit after the caps believe the DC voltages are different. I am trying to get rid of the settling time.

I have tried set ic in the cap to be 0V , and the ADEL-simulation-convergence aids-initial condition. Non seems able to get rid of the initial settling time (in this case, more than 420 ns of useless simulation) I could do something wrong. But can anyone help?

Thanks

Allen

  • Frank Wiedmann

    I would simply change the initial phase of the input signal, so that both input sources have the same voltage at the start of the simulation.

  • AllenD
    in reply to Frank Wiedmann

    Hi Frank,

    Thanks for your reply.

    For the circuit I simulate, I have to try multiple different cases of input phase combination. Some cases, like you suggested, have both input sources have the same starting voltage. But some other cases, I have to have the input like pictures attached previously.

    Since I don't care about the circuit output until the circuit is settled, is there a way to tell the simulator to skip or fast forward the simulation at the beginning and start simulating when it's settled? Or any other solution ?

  • Frank Wiedmann
    in reply to AllenD

    Well, the pss and hb analyses are designed to examine the settled state, but they will probably not be much faster in this case, where the settling is pretty quick. They might also require an initial tran analysis with a certain duration (tstab) for good convergence. For very slow settling, an envelope analysis can be used to speed up this initial simulation (option "Use Envelope for tstab").

    In general, however, it is preferable to set up the initial state of the circuit in such a way that no settling is required. For this purpose, you could use for example the delay parameter of the voltage source, so that you just have the dc voltage at the beginning of the simulation and the sine wave only starts after a certain amount of time.

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