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measure consumption power including voltage sources insides the sub cellviews

MahmoudDeghadi
MahmoudDeghadi over 6 years ago

Hi everyone ,

I have made cellviews for each logic gates (and, or, xor ...) ,each logic gate has its voltage supply (Vdc) .

And, I have made many copies of this cell in my circuit ,such that there is not any Vdc in the final schematic containing these gates.

Finally, I want to measure power consumption in circuit as whole  ??

Thanks

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  • Andrew Beckett
    Andrew Beckett over 6 years ago

    That's a very odd way to have constructed your design. Usually it's wise to separate the design from the test bench, so incorporating the voltage sources in the design is asking for trouble (in many points in the flow - for example, how are you going to LVS the design when you come to layout when the supplies are inside each cell?)

    You can turn on the saving of power by going to Outputs->Save All and then near the top change the setting of Select power signals to output (pwr). You can set this to total, subckts, or all. If you set it to total, then just the total output power is saved, subckts will save the total plus the output from each cell, and all will be the total, subckt power and the power from each device.

    Then after simulation, go to Results->Direct Plot->Main Form, pick the tran output, and then under Power you can plot the total power, or power from a selected instance.

    Regards,

    Andrew

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  • MahmoudDeghadi
    MahmoudDeghadi over 6 years ago in reply to Andrew Beckett

    I have already removed all sources in sub cells and put only one Vdc in the main cell and it works correctly.

    thanks alot.

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to MahmoudDeghadi

    Note that the approach I suggested of saving the power will work even if you do have the voltage sources in the sub cells - that said, removing them is still a good idea, so glad you've done that.

    Regards,

    Andrew.

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