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Cadence Liberate Characterization of Complex Logic Cells

anurans

Hi,

I am trying to characterize a combinatorial circuit which has 5 (A, B, ...., E) inputs and 3 outputs (X, Y, Z). As per the cell behavior, output Z does not depend on input E. When I perform the characterization without user defined "define_arc" s, the process fails trowing following error :

ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'UTCOMX', r_pin:'E', r_pin dir:'r', pin:'Z', pin dir:'r', type:'combinational rise_transition' when: (!D * A * B * !C). To debug, review the saved simulation results for deck: delay_21. Possible solutions include setting 'extsim_exclusive' to 1 and 'sim_estimate_duration' to 0 with increased 'sim_duration' as needed, and rerun.

My questions are :

1. Can we use define_arc in following format to include only valid logical states [ in this case removing E (-related pin) to pin Z (- pin)] for the given cell ?

//Assume that pin_list order is A B C D E X Y Z

//define_arcs for A -> Z transitions
define_arc \
- vector {RXXXXXXR} \
- related_pin A \
- pin Z \
UTCOMX

define_arc \
- vector {RXXXXXXF} \
- related_pin A \
- pin Z \
UTCOMX

//Same routine goes for B -> Z, C -> Z .... and other combinatorial states except E -> Z !

2. In 1.) case, let's say we do not specify "- type" (i.e. hidden, power or delay) inside define_arc ! Does Liberate still calculate hidden, switching power and delay values for each define_arc state automatically ?

3. Is there an easy way to exclude E -> Z monitoring without specifying the define_arcs manually for all other states ?

Thanks in advance

Ranaya

Parents
  • Guangjun Cao

    1. if you want to make sure all possible arcs to be characterized, you can start with char_library -trial to generate a dummy .lib file, Then, use read_library-->write_template -verbose to dump all the arcs found by Liberate. Next, you can review the define_arc commands and remove all invalid arcs. finally, using the modified template, you can use char_library -user_arcs_only to do the full characterisation.

    2. the template you created in "1" should have all arcs. in any case, when -user_arcs is used, Liberate should also characterize hidden arcs;

    3. if you want liberate to do an fully automated characterisation without a template, you can use define_arc -ignore -pin Z -related_pin E -pin_dr <R or F> -related_pin_dir <R or F> cellname to exclude an arc.

    Regards,

    Guangjun

  • anurans
    in reply to Guangjun Cao

    Hi,

    I ran into another issue when converting .lib to .db. I use Synopsys Design Compiler for that. Now the tool complains "There is no timing arc available from pin E to Z" and the conversion fails. Is there a way to bypass this error or is the trick "ignoring" not the right thing to do here ?

    Thanks

  • Guangjun Cao
    in reply to anurans

    If your cell does not have a valid E-->Z arc and this is correct, then there is a bug with the compiler unless there is an option to ignore this. But you have to ask  the tool vendor.

    Guangjun

  • anurans
    in reply to Guangjun Cao

    Dear Guangjun,

    Could you please kindly take a look at the following post made : 

    community.cadence.com/.../input-capacitance-characterization-in-cadence-liberate

Reply
  • anurans
    in reply to Guangjun Cao

    Dear Guangjun,

    Could you please kindly take a look at the following post made : 

    community.cadence.com/.../input-capacitance-characterization-in-cadence-liberate

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