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Cadence Liberate Characterization of Complex Logic Cells

anurans
anurans over 6 years ago

Hi,

I am trying to characterize a combinatorial circuit which has 5 (A, B, ...., E) inputs and 3 outputs (X, Y, Z). As per the cell behavior, output Z does not depend on input E. When I perform the characterization without user defined "define_arc" s, the process fails trowing following error :

ERROR (LIB-54): Some output transitions did not cross both 'measure_slew_*' thresholds for arc of cell:'UTCOMX', r_pin:'E', r_pin dir:'r', pin:'Z', pin dir:'r', type:'combinational rise_transition' when: (!D * A * B * !C). To debug, review the saved simulation results for deck: delay_21. Possible solutions include setting 'extsim_exclusive' to 1 and 'sim_estimate_duration' to 0 with increased 'sim_duration' as needed, and rerun.

My questions are :

1. Can we use define_arc in following format to include only valid logical states [ in this case removing E (-related pin) to pin Z (- pin)] for the given cell ?

//Assume that pin_list order is A B C D E X Y Z

//define_arcs for A -> Z transitions
define_arc \
- vector {RXXXXXXR} \
- related_pin A \
- pin Z \
UTCOMX

define_arc \
- vector {RXXXXXXF} \
- related_pin A \
- pin Z \
UTCOMX

//Same routine goes for B -> Z, C -> Z .... and other combinatorial states except E -> Z !

2. In 1.) case, let's say we do not specify "- type" (i.e. hidden, power or delay) inside define_arc ! Does Liberate still calculate hidden, switching power and delay values for each define_arc state automatically ?

3. Is there an easy way to exclude E -> Z monitoring without specifying the define_arcs manually for all other states ?

Thanks in advance

Ranaya

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  • BarPouy
    BarPouy over 5 years ago

    Hi anurans

    I wanted to generate automatically all cells definition (define_cell) and all arcs definition (define_arc) for all cells of the library in the template.tcl file. I put in this file after defining  slew, measure_slew, delay, set cell_list, indexes the following script:

     set  inputs {I A1 A2 A3 A4 I0 I1 S D SI SE CDN SD}    --- total inputs of cells in the library

     set  outputs {Z ZN Q}                                                          --- total ouputs of cells in the library  

     set  clockss { CP}

     set  asyncs { }    

    define_cell \

              -input $inputs  -outputs  -clock $clocks  -async $asyncs \

              -constraint  constraint_template_11x11 \

              -delay         delay_template_11x11 \

              -power        power_template_11x11 \

            $cell_list

     define_arc \  

              - vector {RXXR} \                 -- assume the maximal inputs of a cell is 4  

              - related_pin $inputs \    

               - pin $outputs \    

               $cell_list  

     define_arc \  

             - vector {FXXF} \  

             - related_pin $inputs \    

             - pin $outputs \

            $cell_list  

    It seems it does not function.

    What is the best way to define all cells and its arcs?

    Kind regards

    BarPouy

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  • anurans
    anurans over 5 years ago in reply to BarPouy

    Hello,

    To generate all the cell and arc definitions, you may use (as Guangjun stated earlier): 

    char_library -trial; //to generate a dummy .lib file, Then,

    read_library existing.lib
    write_template -verbose liberate_templates // to dump all the arcs found

    This will generate all the arcs related to hidden, timing, constraints etc. If you had already done this, you should look at the log file for any possible issues. If its less descriptive, add following before char_library command : 

    #####--------------------------------------------------------------------------------------------------------------------------------------------------
    ##### Debug variables
    #####--------------------------------------------------------------------------------------------------------------------------------------------------
    #select_index -style 1x1 ;# run only 1st point in table

    set_var bisection_info 4 ;# print additional bisection search info to output log
    set_var power_info 2 ;# print additional power calculation info of table's 1st point to file decks/po

    set_var ski_enable 0
    set_var extsim_save_passed all ;# save all run decks and output files
    set_var extsim_save_failed all ;# save all run decks and output files
    set_var extsim_save_verify 2 ;# save verify deck
    set_var extsim_deck_dir [file normalize "Liberate_Out/decks"] ;# specify directory for SPICE decks and output files
    set_var extsim_tar_cmd "" ;# disable tgz of simulation decks and run logs
    #####-------------------------------------------------------------------------------------------------------------------------------------------------

    liberate char.tcl |& tee char.log // your log file

    This would give you a thorough look to the issues you have. May be you should do the debugging ONLY to the erroneous cells, otherwise you will end up having a very large deck file.

    Anuradha

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  • BarPouy
    BarPouy over 5 years ago in reply to anurans

    Hello,

    Thank you for your suggestion.

    I tried with >char_library -trial, however the "Command not found"! Maybe with >liberate char_library -trial ? 

    Then I tried with my top scrip and generate only for one cell, as Guangjun suggested. A  .trial.ldb.gz file is generated. After ungzip of this file I tried to read it. >read_library thisFile.ldb (should be converted to .lib ?),  again, "Command not found"!

    Regards

    BarPouy

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  • Guangjun Cao
    Guangjun Cao over 5 years ago in reply to BarPouy

    -trial is an option for char_library. Please read the manual on char_library command! I suggest you either take a Liberate training, or go though a RAK to understand Liberate flow/command.

    Regards,

    Guangjun

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  • BarPouy
    BarPouy over 5 years ago in reply to Guangjun Cao

    You are right, a training is very helpful! However at the moment I've not possibility to do that. Actually I read RAK, I will read through RAK again.

    For one cell it seems I came further! Now I have this WARNING / ERROR.

    WARNING (LIB-411): An estimated max load value of 2.8181e-16F will be used for slew: '7.61097e-09s' pin: 'Z' of cell: 'AN2d1' because the auto_index algorithm failed to determine the max load using bisection. This can occur when the inside-view algorithm cannot determine a valid vector. Add appropriate 'define_arc' commands specific to pin 'Z' and rerun.

    *Error* (char_library -auto_index) : the maximum load for AN2d1:Z is smaller than the specified min_output_cap (2.8181e-16F <= 1.07555e-15F).  This problem might be caused by insufficient drive strength or a max_transition value that is too small. 

    Regards

    BarPouy

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  • BarPouy
    BarPouy over 5 years ago in reply to Guangjun Cao

    You are right, a training is very helpful! However at the moment I've not possibility to do that. Actually I read RAK, I will read through RAK again.

    For one cell it seems I came further! Now I have this WARNING / ERROR.

    WARNING (LIB-411): An estimated max load value of 2.8181e-16F will be used for slew: '7.61097e-09s' pin: 'Z' of cell: 'AN2d1' because the auto_index algorithm failed to determine the max load using bisection. This can occur when the inside-view algorithm cannot determine a valid vector. Add appropriate 'define_arc' commands specific to pin 'Z' and rerun.

    *Error* (char_library -auto_index) : the maximum load for AN2d1:Z is smaller than the specified min_output_cap (2.8181e-16F <= 1.07555e-15F).  This problem might be caused by insufficient drive strength or a max_transition value that is too small. 

    Regards

    BarPouy

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  • Guangjun Cao
    Guangjun Cao over 5 years ago in reply to BarPouy

    the message is very clear. have you tried anything following the message?

    as a quick test, you may remove -auto_index and define your own load index, save the deck. if the error happens again, check the decks. run spectre on the decks and check if the waveform show expected transitions at all ports.

    Regards,

    Guangjun

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  • anurans
    anurans over 5 years ago in reply to BarPouy
    BarPouy said:
    the maximum load for AN2d1:Z is smaller than the specified min_output_cap (2.8181e-16F <= 1.07555e-15F)

    Mmm.... how did you specify the min_out_cap ? When liberate fails to find appropriate max_cap means, your max_transition is not suitable for the auto_indexing calculation. The max_cap is always measured with respect to the max_trans defined in the template. You need to adjust it properly....

    Anuradha

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  • BarPouy
    BarPouy over 5 years ago in reply to Guangjun Cao

    Thanks a lot!

    I've not used -auto_index. I put manially all arcs for one cell in the template and run again. I get the same WARNING / ERROR.

    I used

    set_var max_transition 5e-08

    This should be enough for an AN2d1, even in subthreshold regime.

    Regards

    BarPouy

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  • BarPouy
    BarPouy over 5 years ago in reply to anurans

    Thank you anurans!

    I increased the max_transition to 50 ns (set_var max_transition 5e-08) only to see what happen, actually it's too high even in subthreshold regime. As I designed and I did postlayout simulation (with Monte Carlo), the transition was much much lower.

    Regards

    BarPouy

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  • anurans
    anurans over 5 years ago in reply to BarPouy

    As Guangjun advised then re-run the failed decks. Locate the failed sim.sp file in the deck folder. Remove save=nooutput from .sp file and : 

    spectre sim.sp

    then use viva to check the waveforms. You should see the failure of the cell given bisection search value.

    Anuradha

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  • BarPouy
    BarPouy over 5 years ago in reply to anurans

    I try to understand what you wrote. Aussuming the cell_nam is AN2d1. Do you mean I should generate AN2d1.sp in AN2d1 folder? Then 'remove save=nooutput from AN2d1.sp'. After that run spectre An2d1.sp. Finally check waveforms.

    I've not viva license, it should be also possible with ADE_L /XL?

    I will do that.

    Thank you!

    Regards

    BarPouy

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  • anurans
    anurans over 5 years ago in reply to BarPouy

    No, during the characterization you can save your simulation decks for debugging : 

    set_var extsim_deck_dir /home/work_dir/decks_DDC_smth
    set_var extsim_save_passed deck

    (before char_library) !

    This deck folder should report simulation data for each cell in separate folders which could be PASS or FAIL. Locate the failed folder of your failed cell. It should have the sim.sp file. 

    ADX should be possible. Viva is their visualization tool....

    Anuradha

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  • Guangjun Cao
    Guangjun Cao over 5 years ago in reply to BarPouy

    1.Check the manual for correct sytanx and use these commands,

    set_var extsim_deck_dir full-path-here

    set_var extsim_save_failed deck

    set_var exism_save_passed none

    2. If your run has failed characterization at simulation stage, go to the deck dir. You will see saved deck dir or a tarball. Inside each sub dir, you will see a map.list. open this file you will see where the failure is. Find the deck (sim.sp)for the failed char, remove save=nooutput, then run spectra on it. 

    3. Start viva with ade license. Open the simulation results and check the waveform.

    4. Review the settings and variables in the deck-- are they the same as your own test bench? If not, either your test bench or the characterization settings need to be corrected.

    Tip. select_index 2x2 may use min/max indecis, which makes the debug easier.

    Guangjun

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  • BarPouy
    BarPouy over 5 years ago in reply to Guangjun Cao

    Hi Guangjun, Hi anurans,

    Thank you for your tips. I'm following it.

    Kind regards

    BarPouy

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  • BarPouy
    BarPouy over 5 years ago in reply to Guangjun Cao

    Hello Guangjun

    Automatically generation of the template (with defined cells) for the cells having the same inputs /outputs, e.g. AN2d1 /OR2d1 (inputs: A1 A2) can be doen. However, If I mix such cells with the cells having more inputs /outpus or other inputs /outputs, e.g. AOI21.d1 (inputs: A1 A2 A3) or DFd1 (inputs: D, clock: CP, output: Q), then the template will not be generated and gives ERROR (see please below). It's clear, if I write for each class of cells, having the same inputs / outputs, a separate define_cell,  then this issue does not occur. There is an example of generating automatically template in the page 48 to 50 of 'Virtuoso Liberate Reference Maual', Version 18.1, section 'TCL Command File'. It shows that it might be possible to generate template of different class of cells like {NAND2X4 NOR2X2 DFFX1} just with one general define_cell.

    What is my mistake?

    Thanks!

    Kind regards

    BarPouy

    ERROR (LIB-520): (char_library): The pin 'D' is not defined for cell 'AN2d1'. This cell will be ignored. Check the netlist and make sure it is consistent with 'define_cell' command.

    ERROR (LIB-203): (char_library): Cell 'AN2d1' is scheduled for characterization but has no netlist, has an empty subckt or has no port on the subckt. This cell will be skipped. Check the netlist and rerun.

    ERROR (LIB-520): (char_library): The pin 'CP' is not defined for cell 'DFd1'. This cell will be ignored. Check the netlist and make sure it is consistent with 'define_cell' command.

    ERROR (LIB-203): (char_library): Cell 'DFd1' is scheduled for characterization but has no netlist, has an empty subckt or has no port on the subckt. This cell will be skipped. Check the netlist and rerun.

    ERROR (LIB-520): (char_library): The pin 'D' is not defined for cell 'OR2d1'. This cell will be ignored. Check the netlist and make sure it is consistent with 'define_cell' command.

    ERROR (LIB-203): (char_library): Cell 'OR2d1' is scheduled for characterization but has no netlist, has an empty subckt or has no port on the subckt. This cell will be skipped. Check the netlist and rerun.

    WARNING (LIB-961): (char_library): Leakage deck initialization was requested using '.ic', but the 'leakage_sim_duration' was set to '0'. This may lead to unexpected leakage characterization results. Change 'leakage_sim_duration' to a positive non-zero value in seconds or change the setting of 'set_sim_init_condition' and rerun.

    Building library database

    Processing cell: AN2d1

    Processing cell: DFd1

    Processing cell: OR2d1

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