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tdnoise (pnoise) simulation: meaning of x-axis and unexpected shape of the integrated noise

Clidre

Hello, have a question about pnoise simulations noise type time domain.

I have a capacitor that is periodically

- initialized with a starting voltage (with a switch);

- charged with a current source (pMOS)

- and discharged with another switch.

The periodicity of the voltage across the capacitance is 2ns.I made a tdnoise simulation choosing a set of time-points during the voltage ramp across the capacitor. I chose the top plate of the capacitor as output node in the pnoise. The result does not convince me at all. Specifically I have 2 questions:

1) Why the x-axis of the integrated output noise is called "timeindex" and not time? And why it stops at 1.8n, while the pss stops at 2n?

2) The shape of the integrated output noise is not as expected. I expected a step of kT/C noise during the initialization, an increasing noise with a ramp (thermal noise integration) during the voltage ramp and a flat profile during the reset. As you can see in the picture below (pink=voltage across the capacitor, green=integrated noise), the green curve stays flat during the voltage ramp. 

I upload also my settings for the pss and pnoise. 

Thanks a lot for any feedback!

  • Andrew Beckett

    Well, for the first question, that's because you've asked for 10 points, and it's taken the PSS interval and divided it by 10 (so 0.2ns). Then it creates 10 points starting from 0 with that step, so the 10th point will be at 1.8ns, not 2ns.

    It's called "timeindex" because it's strobed the noise at that point - it could have been called "time", I guess, but it isn't - this has been this way forever. Quite often you are only strobing (e.g. with jitter) at a small number of points (maybe just one threshold crossing) and so it's to avoid giving the impression that it's a continuous waveform.

    I can't answer the second - I'd probably need to see the circuit and testcase to investigate further. The best thing would be to contact customer support so that you can share your testcase for further investigation. This capability is pretty robust - it's been a key part of our jitter simulation methodology for many, many years, so I'd be surprised if it's the simulator doing the wrong thing, but it may need some interpretation of what is going on in your circuit.

    Kind Regards,

    Andrew

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