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Generating spectre netlist using si gives unexpected bus syntax

Lindi

Hi,

I'm trying to make a netlist with si. I've created my si.env

simLibName = "myLib"
simCellName = "mySch"
simViewName = "config"
simSimulator = "spectre"
simNotIncremental = 't
simReNetlistAll = nil
simViewList = '("veriloga" "ahdl" "spectre" "schematic" "netlist")
simStopList = '("veriloga" "ahdl" "spectre")
simNetlistHier = 't
nlFormatterClass = 'spectreFormatter
nlCreateAmap = 't
simNetlistHier = t

All my bus signals looses their brackets (myBus_1 instead of myBus\<1\>).

Which option do i need to keep the bus format? 

Best regards,

Christian

  • Andrew Beckett

    Christian,

    I split this post into a separate post as it was violating the forum guidelines - you had appended onto an old thread and it was really about a different topic than that thread (which was about CDL netlisting, not spectre netlisting).

    See this article: How to get angular bracket netlisted in spectre netlist generated by SI or OSS based netlisting?

    Regards,

    Andrew

  • Lindi
    in reply to Andrew Beckett

    Hi Andrew,

    Thanks for cleaning up the thread Slight smile

    That was exactly what i needed, thanks!

    Best regards,
    Christian

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