QRC stamp=2 with PVS LVS

Hi Robin

Stamping in layer_setup file works for both Assura-QTS and PVS-QTS flows. Would you please provide more details on the modifications which you had done for the PVS LVS deck?

Best regards
Quek

Hi Quek,

In the original layer_setup file the line for the substrate layers is:

pro_layer=FOX   ext_layer=nxwell,psub

which I modified to:

pro_layer=FOX   ext_layer=nxwell,psub stamp=2

In order that the substrate would be broken up into regions when using R extraction for the power rails. This worked with a foundry Assura LVS which was using geomStamp for the substrate connections in the LVS.

With a PVS LVS deck the substrate layers connections are written as CONNECT commands when running as LVS prior to QRC. Do I need to modify these to STAMP operations for the stamp=2 in layer_setup to take effect or should SCONNECT also work? As I said the Techgen manual doesn't explain how to use stamp=2 with a PVS LVS deck.

Thanks,

Robin

Hi Robin

sconnect cmds in PVS LVS decks should work too.


Best regards
Quek

Hi Quek,

After changing to SCONNECT commands the PVS LVS was passing but I couldn't get the stamp=2 feature in my QRC extraction to take effect.

An example of R extracted spice netlist from my modified Assura LVS and QRC:

X0 net8#2 in#307 vss#75 vss#70 nch_mac L=4e-08 W=1.4e-07
X1 net8#4 in#306 vdd#322 vdd#312 pch_mac L=4e-08 W=1.4e-07

The 4th bulk terminals are connecting to sub-nodes of vss/vdd. The same layout with my modified PVS LVS & QRC:

XM0 net8#2 in#303 vss#75 vss nch_mac L=4e-08 W=1.4e-07
XM1 net8#4 in#300 vdd#316 vdd pch_mac L=4e-08 W=1.4e-07

The 4th bulk nodes are still connecting to the original vss/vdd. I did also investigate using STAMP instead of SCONNECT for psub/nxwell but I found it doesn't work the same in PVS compared to Assura (& possibly Calibre). Instead of stamping connectivity from one layer to another it wants to create a new output layer with the stamped connectivity.

I go back to my original question - does stamp=2 work with a PVS LVS flow?  Since the examples in the documentation only describe what happens with Assura LVS I can't be sure.

Thanks,

Robin

Hi Robin

I have just tested stamp=2 for PVS-QTS flow and confirmed that it is working.

=== lvsfile ===
connect metal1_conn pdiff_conn by cont_pdiff
sconnect pdiff_conn psubstrate by ptap
...
element mos[g45n2svt] _nmos_25 poly_conn ndiff_conn psubstrate


=== layer_setup file ===
pro_layer=STI    ext_layer=nwell_conn,Nburied,psubstrate stamp=2 other_ext_layer=ptap
pro_layer=P_SOURCE_DRAIN    ext_layer=ndiff_conn,pdiff_conn


=== extracted spice netlist ===
MM0    net12    net11    net10    gnd#1    g45n2svt ...
MM1    net9    net8    net7    gnd#3    g45n2svt ...
MM2    net6    net5    net4    gnd#5    g45n2svt ...


I have created a testcase and uploaded it to COS article 20484386. If it is necesary, you can file a case to your local Cadence support centre and request the AE to send  you the testcase.

By the way, have you updated the "lvsfile" in QTS tech directory after modifying PVS LVS deck?



Best regards
Quek

Hi Robin

I have just tested stamp=2 for PVS-QTS flow and confirmed that it is working.

=== lvsfile ===
connect metal1_conn pdiff_conn by cont_pdiff
sconnect pdiff_conn psubstrate by ptap
...
element mos[g45n2svt] _nmos_25 poly_conn ndiff_conn psubstrate


=== layer_setup file ===
pro_layer=STI    ext_layer=nwell_conn,Nburied,psubstrate stamp=2 other_ext_layer=ptap
pro_layer=P_SOURCE_DRAIN    ext_layer=ndiff_conn,pdiff_conn


=== extracted spice netlist ===
MM0    net12    net11    net10    gnd#1    g45n2svt ...
MM1    net9    net8    net7    gnd#3    g45n2svt ...
MM2    net6    net5    net4    gnd#5    g45n2svt ...


I have created a testcase and uploaded it to COS article 20484386. If it is necesary, you can file a case to your local Cadence support centre and request the AE to send  you the testcase.

By the way, have you updated the "lvsfile" in QTS tech directory after modifying PVS LVS deck?



Best regards
Quek

Hi Quek,

Thanks for checking this out. I have requested your testcase to see if it gives me any ideas. Just knowing it can work is useful. I did update my lvsfile before rerunning the Techgen script.

I'll update if I make any progress.

Best Regards,

Robin

Just a quick update for anyone searching on the same problem. The can work e.g. with Cadence's generic pdk, but with a foundry PVS LVS/QRC which tend to be more complicated we couldn't get this working. The AE submitted a CCR last year, but wasn't optimistic that anything would happen very quickly.

Regards,

Robin