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  3. Dynamic Glitch Check for gate node of a transistor

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Dynamic Glitch Check for gate node of a transistor

SatendraMaurya
SatendraMaurya over 6 years ago

Hi,

How can I report all the glitches to the gate node of a transistor?

Both below statements does not seem to work

dyn_glitch1 dyn_glitch node=[I0.IGCNTL.ICLK.I74.I69.MN.G]  ] duration=20p high=0.9

dyn_glitch2 dyn_glitch node=[I0.IGCNTL.ICLK.I74.I69.A1]  ] duration=20p high=0.9  //A1 is the input pin for the instance where transistor MN gate is connected

Satendra

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  • Andrew Beckett
    Andrew Beckett over 6 years ago

    Hi Satendra,

    Can you try:

    dyn_glitch1 dyn_glitch inst=[I0.IGCNTL.ICLK.I74.I69.MN] node=[G]  duration=20p high=0.9

    It seems that giving a full hierarchical path in the node parameter doesn't work (this surprised me). Note I am assuming that MN is a subckt instance and it has a node called G within it. Otherwise you may have to do:

    dyn_glitch2 dyn_glitch inst=[I0.IGCNTL.ICLK.I74.I69] node=[A1]  duration=20p high=0.9

    Regards,

    Andrew.

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to Andrew Beckett

    I checked with R&D (CCR 2057653 for my reference) and currently there is indeed a limitation that node cannot be a hierarchical node name - you have to put the hierarchical path in the inst parameter instead.

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to Andrew Beckett

    I checked with R&D (CCR 2057653 for my reference) and currently there is indeed a limitation that node cannot be a hierarchical node name - you have to put the hierarchical path in the inst parameter instead.

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  • SatendraMaurya
    SatendraMaurya over 6 years ago in reply to Andrew Beckett

    Hi Andrew,

    Thanks a lot for the reply. Yes splitting into inst and node works. So this solves my issue. I can use this for my development.

    I have one more query. Is there a way to write a normal text report file instead of xml file. I will have to learn to parse xml. Also I noticed the node report it generates is the for the actual netname and not the inst+node hierarchy name. Is there a switch that will let glitch report inst+node name rather than actual netname in the design.

    Satendra

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to SatendraMaurya

    Hi Satendra,

    You can generate a text report by adding:

    myOptions options check_format=text

    in the netlist. The myOptions can be whatever you want, provided it's a unique name for the options statement - or you can add check_format=text on any of the existing options statements you might have in the netlist. This changes the report from the default "xml".

    There's no option to split up the hierarchical node name into two pieces - I get (for example):

     Design Check Instance Summary
    	title	count	type	parameters
    	dyn_glitch3	        6	dyn_glitch	dyn_glitch3 dyn_glitch node=["g"] inst=["Ibuf1.INV1"] duration=1e-10 high=1.2 
    	dyn_glitch4	        6	dyn_glitch	dyn_glitch4 dyn_glitch node=["a"] inst=["Ibuf1.INV1"] duration=1e-10 high=1.2 
    	dyn_glitch5	        6	dyn_glitch	dyn_glitch5 dyn_glitch node=["first"] duration=1e-10 high=0.9 
    
    
     dyn_glitch3 : Dynamic Glitch Check
    Id	Checker Name	Analysis Name	Node Name	Start (s)	Duration (s)	Peak Value (V)	Static Voltage (V)
    1	dyn_glitch3	tran	Ibuf1.INV1.g	0.0	3.886085e-12	0.0	1.2
    3	dyn_glitch3	tran	Ibuf1.INV1.g	3.886085e-12	5.50367e-11	1.192182	0.0
    7	dyn_glitch3	tran	Ibuf1.INV1.g	2.000332e-08	5.5601e-11	1.193175	0.0
    10	dyn_glitch3	tran	Ibuf1.INV1.g	4.000332e-08	5.560101e-11	1.193175	0.0
    13	dyn_glitch3	tran	Ibuf1.INV1.g	6.000332e-08	5.560101e-11	1.193175	0.0
    16	dyn_glitch3	tran	Ibuf1.INV1.g	8.000332e-08	5.560101e-11	1.193175	0.0
    ...

    I also found that for some reason it ends up being slower to run the simulation when the text report is produced - not obvious why. I filed CCR 2058790 for this to understand what is going on.

    The alternative would be to write an XSLT style sheet to convert the XML to text, but that's definitely not a trivial task! (each dynamic check has potentially different parameters, although maybe a common bit of XSLT could be used - didn't think about it too hard since there's a text report available).

    Alternatively, if running in ADE (XL, Explorer, Assembler), the checks and asserts assistant allows tabular reporting which could be saved into a CSV file.

    Regards,

    Andrew.

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to Andrew Beckett
    Andrew Beckett said:
    I also found that for some reason it ends up being slower to run the simulation when the text report is produced - not obvious why. I filed CCR 2058790 for this to understand what is going on.

    It seems that the slowdown is a consequence of the program that is used to convert the SQL database into a text file. It's pretty much a fixed overhead rather than something that scales with the length of the simulation, and we have no plans to change that (the text output is not widely used - most would use the output within ADE which queries the SQL database) or the XML results.

    Regards,

    Andrew.

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