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Virtuoso flatten verilog netlist generation question

Joonsoo

Hi,

Since some sw does not understand the bus type instance format, I would like to have a flattened Verilog netlist.

Is there an option to generate flattened verilog netlist?

(Current output)

buffer I0[1:0] ( .Z(net0_1_, net0_0_), .I(net1_1_, net1_0_));

(Desired format)

buffer I0_1_ ( .Z(net0_1_), .I(net1_1_));

buffer I0_0_ ( .Z(net0_0_), .I(net1_0_));

Regards,

Parents
  • Andrew Beckett

    You can add this in your .simrc (you can also type it in the CIW):

    vlogExpandIteratedInst = t

    See Efficiently handling iterated instances using the NC-Verilog OSS netlister for more details.

    Andrew

Reply
  • Andrew Beckett

    You can add this in your .simrc (you can also type it in the CIW):

    vlogExpandIteratedInst = t

    See Efficiently handling iterated instances using the NC-Verilog OSS netlister for more details.

    Andrew

Children
  • rish87
    in reply to Andrew Beckett

    Hi Andrew,

    I'm trying to generate netlist from schematics where each instances have a property "LVS Ignore" . If the value is TRUE then that instance should not come in the netlist. I tried writing hnlUserIgnoreCVList=list(list("library" "cellName")) but this will ignore all the cells which has the name cellName. Whether the instance should be there or not must depend on "LVS ignore" property.

    Can you help me on this?

    Thank you

    Harish

  • Andrew Beckett
    in reply to rish87

    Hi Harish,

    First of all, please read the Guidelines for the Custom IC Design Forum. This post seems to have nothing to do with the original question in the thread, and the guidelines ask you not to post on the end of old threads anyway.

    Please post a new question (i.e. a new thread), providing information about which netlister you're using, and precisely what properly you've used, as well as the software version (i.e. the things the forum guidelines ask you to do). The lvsIgnore property does not impact all netlisters, because some are not used for LVS purposes...

    Regards,

    Andrew.

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