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  3. Import .spef file in Spectre

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Import .spef file in Spectre

Hackasim
Hackasim over 6 years ago

Hello there! 
I would like to know whether (and in case how) it is possible to include into the spectre circuit netlist the .spef file, generated after the P&R, in order to simulate the circuit also with the parasitic Rs and Cs.

Thank you in advance.

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  • Andrew Beckett
    Andrew Beckett over 6 years ago

    Whilst there is a capability in spectre to do parasitic stitching, that's not something we actively encourage (the user interface for it in ADE is not shown as standard because of this). That's because stitching is always tricky - often the spectre netlist doesn't directly correspond to the netlist used for LVS (both in terms of device naming, and sometimes series connected devices are net listed differently). So the recommendation is to use DSPF rather than SPEF. DSPF includes not only the parasitics but the designed devices too - and another benefit of that is you then can use the extracted device parameters (so can include layout-dependent-effects). SPEF however only contains the parasitics, so you'd be using the original (schematic) device parameters - this is another benefit of using DSPF.

    In the DSPF flow, you simply need to reference the DSPF file from the Setup->Simulation Files form in ADE. The port ordering should (generally) be handled automatically because of how the DSPF is included into the design.

    Regards,

    Andrew.

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  • Hackasim
    Hackasim over 6 years ago in reply to Andrew Beckett

    Thanks for the answer!
    Another thing: since we do not have the proper files for RCExtraction with QRC, would the results provided by Innovus parasitic extraction be still appreciable (even though less precise)?

    Best regards,

    Simone

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to Hackasim

    Hi Simone,

    Innovus only does cell-level extraction and I was assuming this would be transistor level DSPF. I've not tried using the results from the built-in Innovus cell-level extractor - it may be able to continue using the leaf level cells from the schematic. Not sure - you'd probably need to suck it and see!

    Andrew.

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  • Hackasim
    Hackasim over 6 years ago in reply to Andrew Beckett

    Hi Andrew,
    I've done a simulation for a simple 16bit RCA with and without parasitics: worst case increased by 11% and power consumption by 23%. 
    I also read on the documentation that Innovus is only able to extract the parasitics from interconnection, is it correct? If so, it would be enough for our purpose, which is computing and studying the effect of interconnections in certain circuits.

    Simone.

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  • Andrew Beckett
    Andrew Beckett over 6 years ago in reply to Hackasim

    Hi Simone,

    Yes, it will just extract the interconnect between the placed cells/blocks.

    Andrew.

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  • anurans
    anurans over 6 years ago in reply to Hackasim

    Hi Simone,

    Did you use the DSPF file in ADE to generate these numbers ? I do a quite similar experiment which needs interconnect parasitics to be simulated with the cells (In my case I have cells with parasitics). I have used SPEF with back-end STA tools, but no luck of using the interconnect DSPF file in ADE.

    Thanks

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