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Is there any tips & simulator settings to accelerate tran initial converge of ams top analog&digital simulation ?

Zest

current status: ams top  analog(schematic)&digital(rtl) simulation tran initial converge takes too long   >4hours

Is there any tips & simulator settings to accelerate tran initial converge for ams top simulation?

There are 3 tips I've already used below:

1 set initial Q value for meta-stable dff

2 set regulator initial out to its target stable voltage

3 set diff voltage H-L to oscillator's differential output

Parents
  • Zest

    add 1 setting :

    use aps instead of aps++ for more finer steps algorithm

Reply
  • Zest

    add 1 setting :

    use aps instead of aps++ for more finer steps algorithm

Children
  • Andrew Beckett
    in reply to Zest

    I don't think you've really given enough details to be able to advise appropriately. Please contact customer support so that we can look at this in more detail.

    Thanks,

    Andrew.

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