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  3. Simulation with dspf_include

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Simulation with dspf_include

BrJaWr
BrJaWr over 6 years ago

I'm trying to make a single testbench that will work with schematic or dspf simulations with ADE.  When switching from the schematic to dspf the hierarchical delimiter changes from "/" to ".".  Reading through old messages it appears that "/" is always for a schematic and "." for a netlist.  I also see that some extraction tools will create an amap file to take care of translation.  

I'm wondering if there is anyway to change the netlist delimiter to use a "/" so I can only have one testbench?  Alternatively, can an amap file be created manually?  Is the format documented anywhere?  In our case we are making sure the signal names exist in both the schematic and in the dspf so naming shouldn't be required.

I can think of some ugly was to do this with skill and/or hierarchical probes but I really don't want to have to mess with that...

Thanks

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  • Andrew Beckett
    Andrew Beckett over 6 years ago

    You should take a look at What’s New in Virtuoso IC6.1.8 and ICADVM18.1 ISR3 - there's a section there on a new capability for performing out-of-context probing for DSPF include files and DSPF views.

    The names with "/" are "schematic" names, and the mapping to "netlist" names is performed at netlisting time, and so only gets generated for things that are actually netlisted. The format is not documented (and liable to change), and I'm not convinced that would be the right solution anyway. The newly released approach is a solution to solve this problem by giving hints as to how the mapping should be performed for external DSPF files.

    Regards,

    Andrew.

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