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emergency help!!! logic gates

hitman84

first of all, I apologize for my poor English

I use a logic gate like or from tsmc18sc library and want to simulate it with pulse input. when I simulate it in tran mode

the output is always zero

  • Andrew Beckett

    The issue is almost certainly that you don't have any supplies connected. Since there are no supply pins for the OR gate, look inside at the schematic and I expect there are some global nodes for the supply and ground nets (maybe vdd! and vss! or maybe gnd! - you'll need to check). Anyway, you will need to ensure that you have a vsource (or two if the VSS connections in the OR gate are not to gnd!) set to type "dc" at the top level test bench connected to those global nets.

    Andrew.

  • hitman84
    in reply to Andrew Beckett

    Many thanks for your reply. But I can't find those nodes. When I open property window I can't find the vdd or vss. How can I set this

  • Andrew Beckett
    in reply to hitman84

    You need to descend into the schematic for the OR gate.

    Andrew.

  • hitman84
    in reply to Andrew Beckett

    really sorry to ask you again. i'm new here. how  can I descend into the schematic for a gate?

  • hitman84

    I'm not sure that I did it correct or not but I have something like this for OR gate

  • Andrew Beckett
    in reply to hitman84

    You'd normally do (in IC5141 since you're using an old version), Design->Hierarchy->Descend Read and then click on the OR gate. Pick the "schematic" view from the cyclic list, and then OK. 

    Your picture doesn't show me how it's connected - there's a net called "PINVDD" but it's not clear if is connected to anything. It looks as if the schematic was automatically generated from importing a SPICE netlist, but this is a bit of a guess...

    Andrew.

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