Layout Suit L Editor: Transistors Properties and Pin Definition

Hello,

I'm working with the TSMC 0.18um PDK for our Labs. I faced two problems which are new in this PDK for me against the X-Fab or AMS. I will be appreciated if anyone shares his/her experience towards them.

1. I'm using the Layout L for drawing my layout of the schematic. Why when I import the layout of a transistor and remove the source or drain contacts of it, the diffusion region of the contacts will remain? For example, when two transistors are in the cascode structure, and you don't need to the common node between them, you prefer to remove their contacts that in the layout be able to place two transistors as close as possible (Poly distance). But when the diffusion region remains, you cannot do that. My question is here, is there a different setup for removing the diffusion region of the contact in TSMC PDK? However, I checked it with Layout XL, and it did it automatically (Removing diffusion) for the same structure. How can I do it manually?

2. Regarding the Pin definition in the layout, I cannot define a pin on the poly layer with Poly Pin. I mean that when we want to set a pin on the poly with Poly Pin Layer, it'll not recognize with LVC check as a port. I should use a Poly-MET1 Via and then create a pin with MET1 pin. My question is here that whether TSMC PDK only allows the user to use of Metal for pin definition or not. I haven't faced any problem with Pins have been defined by Metal. 

Best,

Hello,

I'm working with the TSMC 0.18um PDK for our Labs. I faced two problems which are new in this PDK for me against the X-Fab or AMS. I will be appreciated if anyone shares his/her experience towards them.

1. I'm using the Layout L for drawing my layout of the schematic. Why when I import the layout of a transistor and remove the source or drain contacts of it, the diffusion region of the contacts will remain? For example, when two transistors are in the cascode structure, and you don't need to the common node between them, you prefer to remove their contacts that in the layout be able to place two transistors as close as possible (Poly distance). But when the diffusion region remains, you cannot do that. My question is here, is there a different setup for removing the diffusion region of the contact in TSMC PDK? However, I checked it with Layout XL, and it did it automatically (Removing diffusion) for the same structure. How can I do it manually?

2. Regarding the Pin definition in the layout, I cannot define a pin on the poly layer with Poly Pin. I mean that when we want to set a pin on the poly with Poly Pin Layer, it'll not recognize with LVC check as a port. I should use a Poly-MET1 Via and then create a pin with MET1 pin. My question is here that whether TSMC PDK only allows the user to use of Metal for pin definition or not. I haven't faced any problem with Pins have been defined by Metal. 

Best,

First of all, please read the forum guidelines (the pinned post at the top of each forum) such as Guidelines for the Custom IC Design Forum

For your first question, I don't have the latest PDK (only a very old one) but I see that there is a hidden parameter on the transistors called leftShape and also rightShape. It doesn't show up because in the CDF if it marked as not being displayed as it's not intended for user interaction (it's triggered by the layout XL abutment though). You can change it by selecting the transistor you want to change and then:

geGetSelSet()~>leftShape="same"   ; or "normal" to reset

geGetSelSet()~>rightShape="same"   ; or "normal" to reset

It may be different in the PDK you're using.

For the second, this may depend on which tool you're using for LVS (I assume you meant LVS?). Looking at the Assura rules in the kit I have a copy of, it certainly seems to use Poly/pin as a pin. It's a little less clear whether the Calibre (a Mentor tool) rules support this or not. This is really a question for the foundry though, as it may depend on the precise variant of PDK you're using.

Andrew.

Thanks. Ok, I'll read it. 

I used your tips. it worked. But my question is here why when I change the display option of  LeftShape and RightShape in the CDF editor, it will appear in the properties windows of the transistor but it won't be active to change. I think it is depended to active another parameter!! how can active it in the properties windows of transistors?

Andrew Beckett said:

DF if it marked as not being displayed as it's not intended for user interaction