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Incorrect waveforms when using Spectre XPS

Hello,
I'm simulating an old processor to test Spectre XPS. When I simulate with Spectre only or Spectre APS++ the results are fine, however, when I simulate with Spectre XPS the resulting waveforms aren't correct.
The first image was obtained with Spectre APS ++ which is correct.
The second image was obtained with Spectre XPS and selecting the "Digital instances" (which gave the best results so far):
Even the CLK signal which comes from a Vsource is incorrect.
Here is the config window (I tried to only activate XPS, activate and deactivate aps++, change the digital speed to 1, 2 and 3, select the digital instances / analog instances... nothing gets closer to the APS only simulation) :
Now, what is very odd is that I simulate the very same circuit back in 2017 only by selecting XPS without changing the options and it worked fine. The only things that changes were the Spectre version and the server. Could this be a version or server configuration issue?
You will find attached the spectre.out log file.
Fullscreen spectre_out.txt Download
Spectre (R) Circuit Simulator
Version 16.1.0.614.isr13 64bit -- 2 Feb 2018
Copyright (C) 1989-2017 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

User: rcampono   Host: xxxxx   HostID: xxxxx   PID: 30498
Memory  available: 5.3129 GB  physical: 8.1233 GB
Linux   : CentOS Linux release 7.4.1708 (Core) 
CPU Type: Intel(R) Xeon(R) CPU E5-1620 v3 @ 3.50GHz
        Socket: Processors [Frequency] (Hyperthreaded Processor)
        0:       0 [1438.1] (  4 ),  1 [2922.6] (  5 ),  2 [2487.2] (  6 )
                 3 [2645.1] (  7 )
        
System load averages (1min, 5min, 15min) : 0.2 %, 6.2 %, 13.9 %
Hyperthreading is enabled
HPC is enabled


Simulating `input.scs' on xxxxx at 4:12:44 PM, Wed Jun 19, 2019 (process id: 30498).
Current working directory: /xxxxx/xxxxx/xxxxx/icworkspace/simulations/xxxxx_TestBench/spectre/schematic/netlist
Environment variable:
    SPECTRE_DEFAULTS=-E
Command line:
    /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/bin/spectre -64  \
        input.scs +escchars +log ../psf/spectre.out -format psfxl -raw  \
        ../psf +ms +speed=3 ++aps=conservative +lqtimeout 900 -maxw 5  \
        -maxn 5

Loading /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so ...
Loading /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so ...
Loading /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so ...
Loading /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so ...
Loading /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so ...
Reading file:  /tmp_user/xxxxx/xxxxx/xxxxx/simulations/xxxxx_TestBench/spectre/schematic/netlist/input.scs
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/configs/ms,ms#3.cfg
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/configs/ms,ms.cfg
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/configs/mapsubckt.cfg
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading file:  /usr/include/stdc-predef.h
Reading file:  /tmp_user/xxxxx/xxxxx/icworkspace/corners.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_beol.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_feol.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_fet.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_varactor.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_varind.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_cmim16acc.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/common_esd.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_5u1x_2t8x_lb.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/soa.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_5u1x_2t8x_lb_wo_via.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_6u1x_2t8x_lb.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_6u1x_2t8x_lb_wo_via.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_6u1x_2u2x_2t8x_lb.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_6u1x_2u2x_2t8x_lb_wo_via.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_5u1x_1t8x_lb.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_5u1x_1t8x_lb_wo_via.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/driftotp.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cvar_eg.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/pnpv.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/npnv.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_lohq_5U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_hq_5U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_lohq_6U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_hq_6U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_lohq_high_perf_6U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/microstrip_tline_6U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/differential_tline_6U1x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_lohq_6U1x_2U2x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ind_hq_6U1x_2U2x_2T8x_LB.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmim16acc.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/matching.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rvt.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/eg.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/lsd.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/dsw.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/dsv.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/lsl.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/lsp.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/lsv.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/egncap.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/egpcap.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rpolyp.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rpolyh.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rndiff.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rnwell.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/diode.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rmetal.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/lvt.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/eglvt.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/grhcdsti.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/grhcdgated.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/hcdgated.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/hcdsti.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/rvtnfetsb.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/egnfetsb.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/sblkndres.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/sblkpdres.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/hlvt.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/dsx.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/egext.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/cmom_rf_custom.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/veriloga.scs
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ESD_DIODEGR.va
Reading link:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/ahdl/constants.h
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/ahdl/constants.vams
Reading link:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/ahdl/disciplines.h
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/ESD_DIODE.va
Reading file:  /tmp_user/cadence/kits/cmos28fdsoi_10a/PDK_STM_cmos28FDSOI_RF_mmW_6U1x_2T8x_LB/1.0.a-04/DATA/MODELS/SPECTRE/CORNERS/esdlayer.va
Reading file:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/configs/ms,digital.cfg
Reading file:  /tmp_user/xxxxx/xxxxx/icworkspace/xxxxx/array_input_32/veriloga/veriloga.va
Time for NDB Parsing: CPU = 715.312 ms, elapsed = 884.088 ms.
Time accumulated: CPU = 741.751 ms, elapsed = 884.094 ms.
Peak resident memory used = 74.5 Mbytes.

Existing shared object for module parallel_out_32 is up to date.
Installed compiled interface for parallel_out_32.
Reading link:  /tmp_user/cadence/kits/spectre16.10.614/tools.lnx86/spectre/etc/ahdl/discipline.h
Time for Elaboration: CPU = 2.54328 s, elapsed = 2.54353 s.
Time accumulated: CPU = 3.28515 s, elapsed = 3.42774 s.
Peak resident memory used = 217 Mbytes.


Warning from spectre during hierarchy flattening.
    WARNING (SPECTRE-18018): Analyses 'info' are not yet supported in 'Spectre XPS Mixed-signal Mode'.
    WARNING (SPECTRE-18018): Analyses 'info' are not yet supported in 'Spectre XPS Mixed-signal Mode'.
    WARNING (SPECTRE-18018): Analyses 'info' are not yet supported in 'Spectre XPS Mixed-signal Mode'.
    WARNING (SPECTRE-18018): Analyses 'info' are not yet supported in 'Spectre XPS Mixed-signal Mode'.
    WARNING (SPECTRE-18018): Analyses 'info' are not yet supported in 'Spectre XPS Mixed-signal Mode'.
        Further occurrences of this warning will be suppressed.

Time for EDB Visiting: CPU = 11.1111 s, elapsed = 2.69509 s.
Time accumulated: CPU = 14.4 s, elapsed = 6.12661 s.
Peak resident memory used = 220 Mbytes.


Notice from spectre.
    2 warnings suppressed.


Vsource and Virtual Power Supply Node Summary:
          Type                   #CC         #Bulk       Voltage  Name
       VSOURCE                 17469             0             1  vdd!
           GND                 16138         25944             0  0
       VSOURCE                     0         25944             1  vdds!

            To force a virtual power or ground node, add in netlist
                      optVPN options ms_vpn=[node_name vpn_voltage]
                      optVGND options ms_vgnd=[node_name]
            use keyword auto_vpn if you do not know the vpn_voltage

Notice from spectre during topology check.
    Only one connection to node `gnds!'.
Warning from spectre.
    WARNING (SPECTRE-8286): Ignoring invalid item `I0.U933.MP1.tth' in save statement.
        Node is dangling or part of a dangling chain.
    WARNING (SPECTRE-8286): Ignoring invalid item `I0.U933.MP2.tth' in save statement.
        Node is dangling or part of a dangling chain.
    WARNING (SPECTRE-8286): Ignoring invalid item `I0.U933.MP3.tth' in save statement.
        Node is dangling or part of a dangling chain.
    WARNING (SPECTRE-8286): Ignoring invalid item `I0.U933.MP4.tth' in save statement.
        Node is dangling or part of a dangling chain.
    WARNING (SPECTRE-8286): Ignoring invalid item `I0.U933.M65.tth' in save statement.
        Further occurrences of this warning will be suppressed.
        Node is dangling or part of a dangling chain.
        Further occurrences of this warning will be suppressed.
Notice from spectre.
    Number of thread was limited because of small circuit size.


Global user options:
             reltol = 0.001
            vabstol = 1e-06
            iabstol = 1e-12
               temp = 27
               gmin = 1e-12
             rforce = 1
           maxnotes = 5
           maxwarns = 5
             digits = 5
               cols = 80
             pivrel = 0.001
           sensfile = ../psf/sens.output
       dochecklimit = no
     checklimitdest = both
                vdd = 1
               save = allpub
     subcktprobelvl = 2
               tnom = 25
             scalem = 1
              scale = 1

Scoped user options:
          cktpreset = digital     inst=I9
          cktpreset = digital     inst=I10
          cktpreset = digital     inst=I0

Circuit inventory:
              nodes 133293
    parallel_out_32 2     
           resistor 52836 
            vsource 5     
             utsoi2 52834 

Analysis and control statement inventory:
               info 7     
               tran 1     

Output statements:
             .probe 0     
           .measure 0     
               save 0     


Notice from spectre.
    0 resistors are shorted because of `rabsshort'
    Multithreading Enabled: 4 threads in the system with 8 available processors.
    Spectre XPS Mixed-signal Mode Enabled ( ++aps speed=3 ).

Time for parsing: CPU = 7.3289 s, elapsed = 7.40345 s.
Time accumulated: CPU = 21.729 s, elapsed = 13.5301 s.
Peak resident memory used = 474 Mbytes.

~~~~~~~~~~~~~~~~~~~~~~
Pre-Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~
   -   MS Table model. VDD=1V used for XPS table model creation, to overwrite 
                 tmopt options vdd=val
   -   MS Circuit partitions: 100% transistors and 99.4% nodes are identified as digital partitions.
             One of the following solutions may improve the digital detection.
                 Manually define internal digital power supply nodes and voltages.
                        opt1 options ms_vpn=[VDD_DIG 1.2 VDD_DIG1 3.3]
                        opt2 options ms_vgnd=[VSS]
                 For complex device models use the MS macro model option.
                        opt3 options macro_mos=[pmos_subckt nmos_subckt]
                 Use the cktpreset=digital option to force subcircuits into digital.
                        opt4 options cktpreset=digital subckt=[subckt_def_name]
                        opt5 options cktpreset=digital inst=[subckt_inst_name]
~~~~~~~~~~~~~~~~~~~~~~

Notice from spectre.
    52829 warnings suppressed.

Time for dc init: CPU = 194.965 ms, elapsed = 194.986 ms.
Time accumulated: CPU = 21.924 s, elapsed = 13.7252 s.
Peak resident memory used = 478 Mbytes.


Opening the PSFXL file ../psf/tran.tran.tran ...

************************************************
Transient Analysis `tran': time = (0 s -> 10 ns)
************************************************
Important parameter values:
    start = 0 s
    outputstart = 0 s
    stop = 10 ns
    step = 10 ps
    maxstep = 100 ps
    ic = all
    useprevic = no
    skipdc = yes
    reltol = 100e-06
    abstol(V) = 1 uV
    abstol(I) = 1 pA
    temp = 27 C
    tnom = 25 C
    tempeffects = all
    errpreset = conservative_sigglobal
    method = gear2only
    lteratio = 10
    relref = sigglobal
    cmin = 0 F
    gmin = 1 pS
    rabsshort = 1 mOhm


Wildcard match summary:
              probe v(*) :               80459 

Output and IC/nodeset summary:
                 save   86381   (current)
                 save   79951   (voltage)

    tran: time = 148.1 ps    (1.48 %), step = 60.81 ps     (608 m%)
    tran: time = 348.1 ps    (3.48 %), step = 100 ps          (1 %)
    tran: time = 848.1 ps    (8.48 %), step = 100 ps          (1 %)
    tran: time = 1.348 ns    (13.5 %), step = 100 ps          (1 %)
    tran: time = 1.848 ns    (18.5 %), step = 100 ps          (1 %)
    tran: time = 2.348 ns    (23.5 %), step = 100 ps          (1 %)
    tran: time = 2.848 ns    (28.5 %), step = 100 ps          (1 %)
    tran: time = 3.348 ns    (33.5 %), step = 100 ps          (1 %)
    tran: time = 3.848 ns    (38.5 %), step = 100 ps          (1 %)
    tran: time = 4.348 ns    (43.5 %), step = 100 ps          (1 %)
    tran: time = 4.848 ns    (48.5 %), step = 100 ps          (1 %)
    tran: time = 5.348 ns    (53.5 %), step = 100 ps          (1 %)
    tran: time = 5.848 ns    (58.5 %), step = 100 ps          (1 %)
    tran: time = 6.348 ns    (63.5 %), step = 100 ps          (1 %)
    tran: time = 6.848 ns    (68.5 %), step = 100 ps          (1 %)
    tran: time = 7.348 ns    (73.5 %), step = 100 ps          (1 %)
    tran: time = 7.848 ns    (78.5 %), step = 100 ps          (1 %)
    tran: time = 8.348 ns    (83.5 %), step = 100 ps          (1 %)
    tran: time = 8.848 ns    (88.5 %), step = 100 ps          (1 %)
    tran: time = 9.348 ns    (93.5 %), step = 100 ps          (1 %)
    tran: time = 9.848 ns    (98.5 %), step = 100 ps          (1 %)
Number of accepted tran steps =             104

Maximum value achieved for any signal of each quantity: 
V: V(I0.U4673.MP1.gi) = 1 V
I: I(I10:out[27]_flow) = 129.1 uA
If your circuit contains signals of the same quantity that are vastly different in size (such as high voltage circuitry combined with low voltage control circuitry), you should consider specifying global option `bin_relref=yes'.

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Post-Transient Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   -   Non-default settings that could significantly slow down simulation
          errpreset = conservative_sigglobal, default moderate
   -   10.53 % simulation time spent in analog partition.
       89.47 % simulation time spent in digital partition. Consider use more aggressive XPS options.
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


During simulation, the CPU load for active processors is :
        Spectre  0 (5.4 %)       1 (4.4 %)       2 (4.1 %)       3 (82.2 %)
                 4 (2.7 %)       5 (11.0 %)      6 (3.4 %)       7 (2.9 %)
        Other   
Initial condition solution time: CPU = 0 s, elapsed = 0 s.
Intrinsic tran analysis time:    CPU = 65.7792 s, elapsed = 63.6138 s.
Total time required for tran analysis `tran': CPU = 83.3025 s (1m  23.3s), elapsed = 82.2041 s (1m  22.2s).
Time accumulated: CPU = 105.041 s (1m  45.0s), elapsed = 95.7438 s (1m  35.7s).
Peak resident memory used = 1.55 Gbytes.


Aggregate audit (4:14:23 PM, Wed Jun 19, 2019):
Time used: CPU = 108 s (1m  47.9s), elapsed = 98.7 s (1m  38.7s), util. = 109%.
Time spent in licensing: elapsed = 61.1 ms.
Peak memory used = 1.55 Gbytes.
Simulation started at: 4:12:44 PM, Wed Jun 19, 2019, ended at: 4:14:23 PM, Wed Jun 19, 2019, with elapsed time (wall clock): 98.7 s (1m  38.7s).
spectre completes with 0 errors, 10 warnings, and 7 notices.
Any ideas are welcome.
Best regards,
Raphael
Parents
Andrew Beckett over 6 years ago

Raphael,

Please contact customer support for this issue.

Regards,

Andrew.
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Andrew Beckett over 6 years ago

Raphael,

Please contact customer support for this issue.

Regards,

Andrew.
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