SAVING net VOLTAGE and pin CURRENTS at block level and also saving current in the mos transistors pins in EXTRACTED view

Hi Pyroblast,

There are a few ways to save your voltages and currents. Some designers prefer picking nets and terminals graphically some others prefer command line. For extracted views however, I prefer the command line approach as most design flows at many companies don't provide reliable extracted views with the necessary information you need for saving nets/terminals. Besides, the command line approach works for folks running post layout simulation using some sort of SPF/DSPF files. 

The idea is to create an text file, say "spectre_save_include.scs" and have it included in your simulation with the right save statements. Spectre save statements (assuming you are running Spectre) are fairly simple to understand and well documented by running the following command line from your Linux terminal: "spectre -h save". I have created the following snippet file to provide save statement samples that should answer your questions, just use a similar syntax for your own design.  

// Save file example. Run "spectre -h save" for more info

simulator lang=spectre

// The following will save Voltage on net23 of instance Ipll/XI0/XI1
save Ipll.XI0.XI1.net23

// The following will save Current on Source terminal of transistor M0 of instance Ipll/XI0/XI1
save Ipll.XI0.XI1.M0:s sigtype=subckt

// Example1: The following will save all the d/g/s/b currents of Ipll/XI0/*/M0
save Ipll.XI0*M0 sigtype=subckt

Thank you for your input and the tip with the help.

Those are good example, however when it comes to extracted views for example, if you want to probe a pin in a block from and extracted view, deep in the hierarchy, would this be possible?

Plus, what if you have finger, multiples of transistors and also buses?

Thank you.

All examples I have provided are hierarchical, I have updated the snippet with further comments.

Yes, you can grab an instance from a bus. As for fingers, most if not all extract tools that I know do extract fingers as individual instances of a transistors, same for Fins. So if you have one transistor in your schematic with 2 fingers, then your extracted view would come with 2 instances of a MOS, each corresponding to a given finger. All of this obviously follows the extraction rules defined by your foundry collaterals. Here is an update of the "spectre_save_include.scs"

// Save file example. Run "spectre -h save" for more info. 
// In this snippet, I provided samples on probing currents and voltages in hierarchical instance Ipll/XI0/XI1
// From a Schematic testbench perspective, this means Top Level -> Instance Ipll -> Instance XI0 -> Instance XI0

simulator lang=spectre

// The following will save Voltage on net23 of Ipll/XI0/XI1
save Ipll.XI0.XI1.net23

// The following will save Current on Source terminal of transistor M0 of Ipll/XI0/XI1
save Ipll.XI0.XI1.M0:s sigtype=subckt

// Example1: The following will save all the d/g/s/b currents of Ipll/XI0/*/M0
save Ipll.XI0*M0 sigtype=subckt

// The following will save Current on Source terminal of transistor M0 of Ipll/XI0/XI1
save Ipll.XI0.XI1.M0:s sigtype=subckt

// The following will save Current on Source terminal of transistor M0 of Ipll/XI0/XI1/XI0\<0\>, first instance of the bus.
save Ipll.XI0.XI1.XI0\<0\>.M0:s sigtype=subckt

Thank you for your help. You have been really helpful.

Just one more question: how do we map this into the output setup in ADEXL?

Thank you.

Mapping Spectre Syntax to ADE-XL syntax can be tricky as you have to swap hierarchy delimiters and escape characters among other things. An easy trick is to grab your saved nets/terminals from the results database, plot them then RMB on the signal and send to Calculator or ADE, this would save you the hassle of writing the right syntax.