How to get the cap vs frequency of a MOS by using cadence?

I think it is not necessary to get plots of capacitance vs frequency to find the capacitance value, compared to what is usually done for physical device measurements by determining equivalent series resistance (ESR) and synthetic impedance (Xs). Reason is that the model of the gatecap does not include series inductance which causes self-resonance and makes it hard for practical measurements to use the frequency region where the self-resonant frequency is reached or exceeded.
So in terms of the above circuit; the plot of capacitance vs frequency would constant, thus it does actually not matter which frequency is used.
For practical reasons, the following relation can be applied:
ic [small signal current through capacitance] = uc [small signal voltage over capacitance] / Xc = j * 2Pi * f * C * uc
When choosing uc = 1V, f=1/2Pi Hz = 0.159Hz, then all terms on the right side except C vanish and you get the specialized quantity equation C [F] = j * ic [A] * 1/(V*s), meaning that the value of the current (the imaginary part, to be exact) is directly showing the capacitance value.
The application as simulation needs a single dc voltage source where vdc=<sweep variable> and and vac=1, then an AC simulation @ 0.159Hz is done, and the current is plotted, which directly corresponds to the capacitance value as function of the gate DC voltage (==varactor characteristics), there is not even the need to involve the calculator here.
If there are ohmic components as series or parallel resistance (e.g. gate leakage), then the AC result of ic has a real part > 0 and the calculation gets a little bit more complicated, which however should be fairly easy to solve now.