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Trouble using pPar with Spectre simulation

Hi everyone,

I'm fairly new to Cadence so I'm sorry if this is easily solvable.
I am trying to generate a symbol with a variable parameter. For instance, I have an inverter with the NMOS width set to : pPar("width") and the PMOS width set to: 2*pPar("width").

I have gone through the CDF window to edit the parameter using the base CDF layer. (See picture for reference)

CDF parameter window

Here is the schematic of my simple design:

Schematic of simple inverter with parameter as width.

And here is the schematic using the instantiated inverter as a symbol:

Instantiated inverter symbol.

When I try to run a simple simulation using Spectre, I get the following error:

Output error of the Spectre simulation.

I am wondering what I am doing wrong.

Edit: All schematic have been compiled and checked by the Virtuoso schematic editor with no errors or warnings.

Thank you very much for your help,

Alexandre Boyer

Parents

Andrew Beckett over 5 years ago

Hi Alexandre,

Can you please post lines 59-61 and 67-69 of the input.scs so it's clearer which lines are causing the problem?

Ideally, if the circuit is just as you've shown it, providing the entire input.scs would help. The netlist itself (rather than a screenshot) is preferable (as it's then searchable).

Thanks,

Andrew.
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AlexandreBoyer over 5 years ago in reply to Andrew Beckett

Hi Mr Beckett,

Here is my input.csc for the circuit. I have tried again to solve the issue so the circuit has changed. I will link the new network schematic with it too.

Fullscreen input.csc.txt Download

// Generated for: spectre
// Generated on: Dec  1 16:17:16 2019
// Design library name: lab3
// Design cell name: param_inverter_test
// Design view name: schematic
simulator lang=spectre
global 0
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_bip
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_mim
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_dnw
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_18
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_bip_npn
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfrtmom
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_mos_cap_25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_18
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_disres
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_res
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_na
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmos_33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_hvt
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmvar
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmos_18
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_na
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_na33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_lvt
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfres_sa
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_na33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_esd
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmim
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_25od33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_25od33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_mos_cap
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_25ud18
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmos
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_25ud18
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_na25od33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfjvar
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmos_25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rtmom
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_na25od33
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_dio_na25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfres_rpo
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_hvt
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfind
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_rfmvar_25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_na25
include "/CMC/kits/tsmc_65nm/CRN65GP/TN65CMSP018K3_V1.0C/tsmcN65/../models/spectre/crn65gplus_2d5_lk_v1d0.scs" section=tt_lvt

// Library name: lab3
// Cell name: param_inverter
// View name: schematic
subckt param_inverter A Y
parameters width=130n
    M0 (Y A 0 0) nch l=65.0n w=width*1 m=1 nf=1 sd=200n \
        ad=((1-int(1/2)*2)*(1.75e-07+((1-1)*2e-07)/2+0)+(1+1-int((1+1)/2)*2)*((1/2)*2e-07))*width \
        as=((1-int(1/2)*2)*(1.75e-07+((1-1)*2e-07)/2+0)+(1+1-int((1+1)/2)*2)*(1.75e-07+1.75e-07+(1/2-1)*2e-07+0+0))*width \
        pd=(1-int(1/2)*2)*((1.75e-07+((1-1)*2e-07)/2+0)*2+(1+1)*width)+(1+1-int((1+1)/2)*2)*(((1/2)*2e-07)*2+1*width) \
        ps=(1-int(1/2)*2)*((1.75e-07+((1-1)*2e-07)/2+0)*2+(1+1)*width)+(1+1-int((1+1)/2)*2)*((1.75e-07+1.75e-07+(1/2-1)*2e-07+0+0)*2+(1+2)*width) \
        nrd=(1-int(1/2)*2)*(1e-07*1e-07/(1e-07+1e-07*(1-1))/width)+((1+1)nt((1+1)/2)*2)*(1e-07/1/width) \
        nrs=(1-int(1/2)*2)*(1e-07*1e-07/(1e-07+1e-07*(1-1))/width)+((1+1)nt((1+1)/2)*2)*(1e-07*1e-07*1e-07/(1e-07*1e-07*(1-2)+1e-07*(1e-07+1e-07))/width) \
        sa=175.00n sb=175.00n sca=0 scb=0 scc=0
    M1 (Y A net8 net8) pch l=65.0n w=width*2*1 m=1 nf=1 sd=200n \
        ad=((1-int(1/2)*2)*(1.75e-07+((1-1)*2e-07)/2+0)+(1+1-int((1+1)/2)*2)*((1/2)*2e-07))*width*2 \
        as=((1-int(1/2)*2)*(1.75e-07+((1-1)*2e-07)/2+0)+(1+1-int((1+1)/2)*2)*(1.75e-07+1.75e-07+(1/2-1)*2e-07+0+0))*width*2 \
        pd=(1-int(1/2)*2)*((1.75e-07+((1-1)*2e-07)/2+0)*2+(1+1)*width*2)+(1+1-int((1+1)/2)*2)*(((1/2)*2e-07)*2+1*width*2) \
        ps=(1-int(1/2)*2)*((1.75e-07+((1-1)*2e-07)/2+0)*2+(1+1)*width*2)+(1+1-int((1+1)/2)*2)*((1.75e-07+1.75e-07+(1/2-1)*2e-07+0+0)*2+(1+2)*width*2) \
        nrd=(1-int(1/2)*2)*(1e-07*1e-07/(1e-07+1e-07*(1-1))/width*2)t((1+-int((1+1)/3)*2)*(1e-07/1/width*2) \
        nrs=(1-int(1/2)*2)*(1e-07*1e-07/(1e-07+1e-07*(1-1))/width*2)t((1+-int((1+1)/2)*2)*(1e-07*1e-07*1e-07/(1e-07*1e-07*(1-2)+1e-07*(1e-07+1e-07))/width*2) \
        sa=175.00n sb=175.00n sca=0 scb=0 scc=0
    V0 (net8 0) vsource dc=1 type=dc
ends param_inverter
// End of subcircuit definition.

// Library name: lab3
// Cell name: param_inverter_test
// View name: schematic
I1 (net5 Y) param_inverter width=260n
I0 (A net5) param_inverter width=130n
include "./_graphical_stimuli.scs"
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
    tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
    digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
    checklimitdest=psf 
tran tran stop=4n errpreset=moderate write="spectre.ic" \
    writefinal="spectre.fc" annotate=status maxiters=5 
finalTimeOP info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts  where=rawfile
saveOptions options save=allpub

And here are the new schematic files:

Thank you very much for your hasty reply!

Cheer,

Alex

Andrew Beckett over 5 years ago in reply to AlexandreBoyer

Hi Alex,

The issue is with the lines:

nrd=(1-int(1/2)*2)*(1e-07*1e-07/(1e-07+1e-07*(1-1))/width)+((1+1)nt((1+1)/2)*2)*(1e-07/1/width) \
nrs=(1-int(1/2)*2)*(1e-07*1e-07/(1e-07+1e-07*(1-1))/width)+((1+1)nt((1+1)/2)*2)*(1e-07*1e-07*1e-07/(1e-07*1e-07*(1-2)+1e-07*(1e-07+1e-07))/width) \

These exhibit the classic sign of a problem that occurs if using an old (pretty old) version of IC6.1.X on a newer operating system (so you're possibly running on an unsupported OS). I think it's an issue that was resolved in IC6.1.5 ISR12 (so 6.1.5.500.12), and given that you're running a spectre version from 2009 (MMSIM7.2), it wouldn't surprise me if you're using a very old IC version.

So can you report what Help->About returns (please give the entire subversion number) and also what "lsb_release -a" returns if you type it in a terminal window?

Thanks,

Andrew.
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Andrew Beckett over 5 years ago in reply to Andrew Beckett

BTW, I should point out that this was because of an incompatible change made in the Linux OS (in the C libraries) and we had to adapt the software to deal with it, if it's what I think the problem is. Hopefully I can give you a workaround if the issue is what I think it is.

Regards,

Andrew.
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Reply

Andrew Beckett over 5 years ago in reply to Andrew Beckett

BTW, I should point out that this was because of an incompatible change made in the Linux OS (in the C libraries) and we had to adapt the software to deal with it, if it's what I think the problem is. Hopefully I can give you a workaround if the issue is what I think it is.

Regards,

Andrew.
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