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Save VHDL variables of specific hierachy

michael10

Hello,

I'd like to save all VHDL variables in ADE Assembler of a VHDL file in an transient AMS simulation.

The VHDL file is referenced inside a verilogams wrapper and marked as "External HDL" in the config view of the testbench.

How is it possible to save all variables in this specific subcircuit / VHDL file?

When I save all nets (Outputs -> save all... -> Save nets -> all), the variables are saved. However, this saves also all analog nets, which results in a huge simulation result and is not an option.

Parents

  • You would use the probe tcl file on Simulation->Options->AMS Simulator, Miscellaneous tab. If you use the interactive debugger (simVision) you can create probes interactively and then see the corresponding probe tcl command - so you can use appropriate scoping and so on to create probes for what you want.

    Regards,

    Andrew.

  • in reply to Andrew Beckett

    Thank you for your answer!

    Is it possible to save the subcircuit by using wildcards in the probe command, as it is possible with the save command in spectre?

    Example: let the subcircuit be I1 inside the testbench tb_schematic, the following worked:

    probe -create -emptyok -database ams_database {tb_schematic.I0.I1} -all -variables -memories -sc_processes -depth all

    I'd like to use the tcl file in different testbenches, so I tried to use the following wildcard:

    probe -create -emptyok -database ams_database {*.I1} -all -variables -memories -sc_processes -depth all

    This didn't work, error: xmsim: *E,PWFLEL: Invalid use of wildcards - *.

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  • in reply to Andrew Beckett

    Thank you for your answer!

    Is it possible to save the subcircuit by using wildcards in the probe command, as it is possible with the save command in spectre?

    Example: let the subcircuit be I1 inside the testbench tb_schematic, the following worked:

    probe -create -emptyok -database ams_database {tb_schematic.I0.I1} -all -variables -memories -sc_processes -depth all

    I'd like to use the tcl file in different testbenches, so I tried to use the following wildcard:

    probe -create -emptyok -database ams_database {*.I1} -all -variables -memories -sc_processes -depth all

    This didn't work, error: xmsim: *E,PWFLEL: Invalid use of wildcards - *.

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