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DRC Error Virtuoso 6.1.8 PVS 16.12

Dimitris Ant

hi,

I am trying to create the layout of my schematics. Unfortunately I have a few big capacitors and the error I get when I run DRC check is : 

M6.DN.5:L :

M6 density inside CTMDMY over any 200 um x 200 um area (checked by stepping in 100 um increments) [the overlapped area of checking window and CTMDMY >= 2500 um2] >= 0.5
DENSITY MCAPx_CTMDMY CTMDMY -lt 0.500000 -window 200.000000 200.000000 -step 100.000000 100.000000 -inside_of layer CHIPx -backup -print M6.DN.5L.density M6.DN.5:L:L266326

and I can't understand what this is about. If I make a smaller capacitor then there is no error. But if I use multiple instances of small capacitors then i get again the same error.

I've also measured CMTDMY area and is larger than two times the capacitor(metal) area. 

Parents

  • The rule is specific to whatever technology you're using, but it appears that it's checking precisely what the message associated with the rule says - that the M6 density within CTMDMY (presumably the marker layer for the capacitor) must be over 50% in a certain window size. Presumably that isn't the case if you have either a very large capacitor or lots of small capacitors (presumably if those capacitors are close to each other). Hopefully the design rule manual would give you some guidance on this for your technology - if not, contact the foundry.

    Regards,

    Andrew.

Reply

  • The rule is specific to whatever technology you're using, but it appears that it's checking precisely what the message associated with the rule says - that the M6 density within CTMDMY (presumably the marker layer for the capacitor) must be over 50% in a certain window size. Presumably that isn't the case if you have either a very large capacitor or lots of small capacitors (presumably if those capacitors are close to each other). Hopefully the design rule manual would give you some guidance on this for your technology - if not, contact the foundry.

    Regards,

    Andrew.

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