Flicker noise in switched-bias pMOS

Dear GiuseppeICL,

I am familiar with that paper and its hypothesis. There have been many papers exploring this effect on the 1/f noise of various types of VCOs as well as on the source of the apparent decrease in 1/f noise. I have not seen any specific papers nor data suggesting it is modeled accurately in spectre. In simulations I did perhaps 10 or so years ago when I explored the effect, I did not observe the effect. The last reference I have seen with respect to its accurate modeling (published in mid 2000's) suggest it is not modeled in spectre. I think until a consensus as to its exact root cause is determined, attempts to model it in a general model, such as BSIM, will be limited to custom versions of the model. If other experts have different information, I would also be interested.

Shawn

Hi Giuseppe,

Could you provide a reference for the original paper (title, authors, when and where it was published)? Then I can check with R&D to see whether it's something that could be considered.

Obviously it would be a challenge in the noise modelling in compact device models because these are expressed as a small-signal frequency domain power spectral density; normal noise analysis knows nothing about this cycling of the operating point into different regions. Potentially the periodic analyses could do something about that, but I don't know whether this phenomenon would require additional model parameters to characterise it (as well as code to handle it of course). I've not come across requests to support this phenomenon before (but that may just be that I've not seen those personally; it may have been requested to R&D before though). Having the reference to the published paper would help track down previous requests, and guide any questions I make to the Spectre/SpectreRF R&D teams.

Regards,

Andrew.

Hi Giuseppe,

Could you provide a reference for the original paper (title, authors, when and where it was published)? Then I can check with R&D to see whether it's something that could be considered.

Obviously it would be a challenge in the noise modelling in compact device models because these are expressed as a small-signal frequency domain power spectral density; normal noise analysis knows nothing about this cycling of the operating point into different regions. Potentially the periodic analyses could do something about that, but I don't know whether this phenomenon would require additional model parameters to characterise it (as well as code to handle it of course). I've not come across requests to support this phenomenon before (but that may just be that I've not seen those personally; it may have been requested to R&D before though). Having the reference to the published paper would help track down previous requests, and guide any questions I make to the Spectre/SpectreRF R&D teams.

Regards,

Andrew.

Hi Andrew, Shawn,

Thank you for your prompt replies.

The paper I am referring to, and the first to investigate this phenomenon, is cited as follows:

I. Bloom and Y. Nemirovsky, "1/f noise reduction of metal-oxide semiconductor transistors by cycling from inversion to accumulation", Appl. Phys. Lett., vol. 58, pp. 1664-1666, 1991

It is available online at https://aip.scitation.org/doi/abs/10.1063/1.105130

A more recent IEEE paper that investigated this principle in a similar manner and came to similar conclusions is available at https://ieeexplore.ieee.org/document/4214971

I think that given the substantial flicker noise reduction this phenomenon produces and its ease of application, especially in sampled data circuits, it would be worth implementing it in SpectreRF.

Please let me know if you need any other information.

Regards,

Giuseppe.

Dear Giuseppe and Andrew,

I was just about to post the original reference only to see that  Giuseppe already did! That reference is exactly the paper I read some time ago.

If it helps at all, there is a recent paper (2017) entitled “Analysis and validation of low-frequency noise reduction in MOSFET circuits using variable duty cycle switched biasing” that compares the 1/f noise of a conventional stationary Cadence IC-615 spectre pss/pnoise analysis of a multistage ring VCO with simulation results of the author’s proposed model that includes the impact of the switched 1/f noise (Figure 7). This paper, cited below, might be if interest to either of you or your R&D personnel.

Shawn

Jainwal, M. Sarkar and K. Shah, "Analysis and Validation of Low-Frequency Noise Reduction in MOSFET Circuits Using Variable Duty Cycle Switched Biasing," in IEEE Journal of the Electron Devices Society, vol. 6, pp. 420-431, 2018.

doi: 10.1109/JEDS.2018.2802899

ieeexplore.ieee.org/.../8290662