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Computing logarithm in simulator

smikes
smikes over 5 years ago

I am attempting to convert a voltage to dB in the simulation itself. First thought was to create a verilogA block like this:

`include "constants.vams"
`include "disciplines.vams"

module dB20(vi, vo);

input vi;
output vo;

electrical vi;
electrical vo;

analog begin
V(vo) <+ 20*log(abs(V(vi)));
end
endmodule

This seems to work OK for a transient simulations, but in AC sim the output is totally wrong (should be 0, but is 173700 instead).

Am I doing something wrong here? If this won't work, is there another way of doing this, like a clever arrangement of analogLib components?

Thanks,

Steven

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  • Andrew Beckett
    Andrew Beckett over 5 years ago

    Hi Steven,

    I've been looking into this. First of all, you should remember that the AC analysis is a  linear  simulation, and it linearises the circuit equations around the DC operating point. Given that log is  not  a linear function of the inputs, it clearly will not produce the output in dB in the frequency domain - if it was linear, then doubling the input should double the output, which won't be the case if logs are taken.

    The question now is what it actually does. This is a little odd, and I've not been able to fully explain why the behaviour is as it is. 

    If you'd used ln(abs(V(vi))) (i.e. natural logs and without the multiply by 20) then the output is actually defined as being viAC/viDC. My guess is that it has to linearise an impossible to linearise function somehow, and this is how it does it (what I don't know is why this specific representation is used). So the DC value (from the operating point) will influence the result. Now, if you then use log(abs(V(vi))) instead, log(x) is defined as ln(x)/ln(10) and so the output ends up being (viAC/viDC)/ln(10) - and hence if you have this multiplied by 20, you're getting 20*viAC/(ln(10)*viDC). So I'm sure that's what you're seeing - it will be related to the AC and DC values at the node you've connected to this db20 block.

    Either way, it's not going to do what you want - this is not something you can write a VerilogA model to do in the frequency domain.

    Regards,

    Andrew.

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