How to probe subcircuit currents in a .spf layout extracted Spectre APS simulation

Dear ci07,

I am not sure if this is your issue as you note you are using a C only view to generate the netlist (and hence via resistances are not included), but you might check to make sure the supply nodes to subcircuits below the first level only have a single contact connection - which is highly unusual for any layout. Usually, there are multiple contacts and, as a result, probing the terminal of a subcircuit contained in an extracted view based netlist will not provide an accurate estimate of its supply nor ground current. In a schematic view based netlist, there is, of course, only a single supply and ground connection in most all cases and hence saving the terminal current does provide an accurate estimate of the current.

Shawn

Thank you Shawn.  These are good points.  How other people do this if typical layouts have multiple power contacts?  How to measure accurately the currents into subcircuits in layout extracted simulations?

Regards,

CI

Thank you Shawn.  These are good points.  How other people do this if typical layouts have multiple power contacts?  How to measure accurately the currents into subcircuits in layout extracted simulations?

Regards,

CI

Dear ci07,

How other people do this if typical layouts have multiple power contacts?  How to measure accurately the currents into subcircuits in layout extracted simulations?

I can't speak for everyone - and won't pretend to - so there may be other more efficient means of accomplishing your objective. However, we often create individual extracted views of the subcircuits for which we are interested in the supply currents. Using the hierarchy editor with a config view, you can use your original schematic view to generate the netlist of your top level with  current probes connected to each subcircuit. However, in the hierarchy editor, you can instantiate the extracted views for each of the subcircuits. This will enable you to measure the supply currents of each subcircuit's exracted view based netlist.  

Of course, this will not include any supply currents due to traces at the top level unless you make sure that each extracted view contains all the traces to the following or preceding subcircuit - which is what we do. Hence, the traces to and from all subcircuits are contained within their layouts. In this fashion, all layouts do directly abut eachother and the set of individual extracted views include the traces that interconnect them. The only traces that may be excluded are whatever common power and ground grids you define at the upper layers of metallization.

Does this make sense ci07?

Shawn