Disable specific instances or nets within a subcell of a testbench

Paul,

You could use the spt1switch (or spt2switch etc if you want 2 or more throws for the switch). These allow the switches to be in different positions for different analyses (see "spectre -h switch") but can be used as a general switch controlled by a parameter. The default behaviour of the analogLib components are to have cyclic choices for the positions, but you can pick Parameter type to be "string" which would then allow you to make it a variable that you could change in your test setup.

If you didn't want to put this switch in the actual circuit (down in the hierarchy) you could continue to have the dummy resistor, and then connect it up via deep probes to the ends of the dummy resistor, and have your config set to bind-to-open for that resistor. This way you could keep the config the same for everything, have something physical in the actual circuit, and have the flexibility of parameterising the connection as you asked for.

I think that does all you asked for?

BTW, "mind" is a very different thing - this is not controlling a connection - it's just controlling the coupling between different inductors, and so that's a specific type of component implemented in the simulator.

Regards,

Andrew 

Hi Andrew,

thanks for your answer. What you suggest is basically what I am already doing. I disable the resistor by binding it to open in the config of the testbench and use deepprobes and an sprobe to bypass it.

My problem is, that I dont want to edit the config, because my cells also have configs of their own, which I have to override to be able to disable the resistor. Another idea, instead of disabling the resistor, is to set its value to something large. Is this possible to achieve, maybe with a custom netlist procedure?

No, it's not the same thing (unless I've misunderstood what you want). You can have a deep probe to each side of the resistor, and then in the test bench connect an spt1switch (or one of the other number of throws) to either short the (bound open/missing) resistor, or connect via an iprobe, or an sprobe or whatever you want. You have to create a config with the bind to open for that resistor once for simulation purposes, but then you don't have to touch the config again. The resistor is only there so that you don't have simulation-only components in the actual design, and the config is there to allow you to redirect via the switch in the test bench.

You can then use parameters to control which of the various switches are in various positions - so a variable for each stage connection, for example.

Andrew.

No, it's not the same thing (unless I've misunderstood what you want). You can have a deep probe to each side of the resistor, and then in the test bench connect an spt1switch (or one of the other number of throws) to either short the (bound open/missing) resistor, or connect via an iprobe, or an sprobe or whatever you want. You have to create a config with the bind to open for that resistor once for simulation purposes, but then you don't have to touch the config again. The resistor is only there so that you don't have simulation-only components in the actual design, and the config is there to allow you to redirect via the switch in the test bench.

You can then use parameters to control which of the various switches are in various positions - so a variable for each stage connection, for example.

Andrew.

If you're saying you don't want to have a config at all, well you can't do that. There's nothing you can do from the top level to omit a component lower in the hierarchy - i.e. make it open circuit. Potentially you could create a switch-like component which ends up being a resistor for LVS purposes, but that's about it I think.

Andrew.