apply jitter to oscillator model from external file

Dear Karev11,

Karev11 said:

I'm trying to add jitter to an oscillator model.

I am not sure what your end objective is, but adding the jitter as changes in the edge locations of the oscillator every output transition is similar to what a number of papers have proposed. In particular Ken Kundert has published a number of article where he includes a verilog-A model of an oscillator where various jitter components are included. However, his models generate the jitter values as part of the model and do not access values from an external file. For example, please consider the following two references from his many papers:

https://kenkundert.com/docs/asp-dac99.pdf

(see VCO model with jitter included on page 87)

http://www.designers-guide.org/Analysis/PLLnoise+jitter.pdf

(see page 16 where mention is made of using a table of measured phase noise data for the jitter source)

https://kenkundert.com/docs/aacd97.pdf

(See "listing 1" in Section 4.3 - similar to first reference)

Perhaps this is something you might consider as I am not sure what offset frequency range you are most interested in including in your model. For example, if the VCO is used as part of a phase-locked loop model, the offset frequencies beyond the phase-locked loop bandwidth are of greatest interest in estimating the output phase noise of the entire phase-locked loop. On the other hand, if your VCO is the reference input clock to the loop, the offset frequency range below the loop bandwidth is of greatest importance to model accurately. In essence, perhaps you could model the jitter over the frequency band of most relevance in lieu of using your external file to expedite the simulation.

I hope this helps Karev11.

Shawn

Thanks Shawn for the reply and all the details.

My end objective is having a time-domain VCO model with jitter that can be used to check PLL transient behavior. the VCO has been characterized through both phase noise simulation and measurement, from which we can come up with an example VCO edge timing series and therefore the "external file" in my question

The reason I'm reluctant to use Ken's jitter model (3rd reference in your reply), is that I have yet figured out how that correlates to a known VCO metric (phase noise in this case). as you can see from  dT = jitter∗$dist_normal(seed,0,1), it treats jitter for every cycle as un-correlated

The 2nd reference would be very appealing as it allows user to specify corner frequency and phase noise level, however, its output stays in phase domain, not directly suitable for time domain usage (unless there are tricks to do the conversion that I don't know)

The 1st reference is similar to the 3rd one in terms of jitter modeling except  this part "freq = freq/(1 + dT*freq), I need to digest a bit. it's unclear to me at this point how to correlate that to phase noise

thanks,

Kevin

Thanks Shawn for the reply and all the details.

My end objective is having a time-domain VCO model with jitter that can be used to check PLL transient behavior. the VCO has been characterized through both phase noise simulation and measurement, from which we can come up with an example VCO edge timing series and therefore the "external file" in my question

The reason I'm reluctant to use Ken's jitter model (3rd reference in your reply), is that I have yet figured out how that correlates to a known VCO metric (phase noise in this case). as you can see from  dT = jitter∗$dist_normal(seed,0,1), it treats jitter for every cycle as un-correlated

The 2nd reference would be very appealing as it allows user to specify corner frequency and phase noise level, however, its output stays in phase domain, not directly suitable for time domain usage (unless there are tricks to do the conversion that I don't know)

The 1st reference is similar to the 3rd one in terms of jitter modeling except  this part "freq = freq/(1 + dT*freq), I need to digest a bit. it's unclear to me at this point how to correlate that to phase noise

thanks,

Kevin

Dear Karev11,

Thank you for your helpful answers! I do have a few comments that may or may not be relevant, but thought I would at least express them in the interest of spurring some thoughts...

> My end objective is having a time-domain VCO model with jitter that can be
> used to check PLL transient behavior.

1. If you are using the VCO model to study the transient response of a PLL without including the schematic based model of the VCO, it seems that the inclusion of its phase noise characteristic (via modeling its TIE behavior), may not be needed. In general, the loop dynamics of a phase-locked loop are far more dependent on the VCO's Kvco and its modulation bandwidth than its phase noise characteristic. The only time where I was concerned with the VCO phase noise characteristic as part of a transient response simulation of a phase-locked loop was for an "MTIE" analysis where the wander behavior (phase noise < 2*pi*10 Hz) of the VCO was important. However, the latter analysis is rather specialized and not a common simulation.

> The 2nd reference would be very appealing as it allows user to specify corner
> frequency and phase noise level, however, its output stays in phase domain,
> not directly suitable for time domain usage (unless there are tricks to do the
> conversion that I don't know)

Since the phase is the integral of the frequency, one can include the impact of a phase modulated signal in a VCO model that operates in the time-domain. As a thought example, many years back, I wrote a phase-locked simulator that operates in the time-domain but includes a VCO model that allows for arbitrary phase or frequency modulation events. After modulating the phase, the resulting frequency is determined by keeping track of the phase and creating a clock edge every time the phase crosses pi (i.e., a positive or negative edges every 2pi).

If you happened to view listing 12 of the second reference, it performs a similar operation. In your specific case, you would read in the phase jitter at each edge from a file as a means of modulating the phase in lieu of using the expression shown in listing 12.

Once again, I may be misinterpreting your comment and apologize if I am! I just wanted to potentially add some thoughts that might trigger a thought or two to address your need.

Shawn